* "last user address" is set even if bootp is used without parameters
(and it uses default address).
+======================================================================
+Modifications for 1.0.0:
+======================================================================
+
+* Patch for ERIC configuration and embedded flash environment
+ by Swen Anderson: 30 May 2001
+
======================================================================
Modifications for 0.9.3:
======================================================================
# esd ADCIOP boards
#
-#TEXT_BASE = 0xFFFE0000
-TEXT_BASE = 0xFFF80000
+#TEXT_BASE = 0xFFF80000
+#TEXT_BASE = 0xFFFC0000
+TEXT_BASE = 0xFFFE0000
#include <ppcboot.h>
#include "eric.h"
#include <asm/processor.h>
-#include <405gp_i2c.h>
#define IBM405GP_GPIO0_OR 0xef600700 /* GPIO Output */
#define IBM405GP_GPIO0_TCR 0xef600704 /* GPIO Three-State Control */
| indicates NO Power or HOST RESET active
| check GPIO7 (HOST RESET#) and GPIO8 (NO Power#)
| for real IRQ source
- | IRQ 28 (EXT IRQ 3) HOST; active low; level sensitive
+ | IRQ 28 (EXT IRQ 3) HOST; active high; level sensitive
| IRQ 29 (EXT IRQ 4) PCI INTC#; active low; level sensitive
| IRQ 30 (EXT IRQ 5) PCI INTB#; active low; level sensitive
| IRQ 31 (EXT IRQ 6) PCI INTA#; active low; level sensitive
+ | -> IRQ6 Pin is NOW GPIO23 and can be activateted by setting
+ | IBM405GP_GPIO0_TCR Bit 0 = 1 (driving the output as defined in IBM405GP_GPIO0_OR,
+ | else tristate)
| Note for ERIC board:
| An interrupt taken for the HOST (IRQ 28) indicates that
| the HOST wrote a "1" to one of the following locations
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
mtdcr(uicer, 0x00000000); /* disable all ints */
mtdcr(uiccr, 0x00000000); /* set all SMI to be non-critical*/
- mtdcr(uicpr, 0xFFFFFF80); /* set int polarities */
- mtdcr(uictr, 0x10000000); /* set int trigger levels, UART0 is EDGE sensitive */
+ mtdcr(uicpr, 0xFFFFFF88); /* set int polarities; IRQ3 to 1 */
+ mtdcr(uictr, 0x10000000); /* set int trigger levels, UART0 is EDGE */
mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- out32(IBM405GP_GPIO0_OR, 0x60000000); //fixme is SMB_INT high or low active??
- out32(IBM405GP_GPIO0_TCR, 0x7E400000);
-
-// i2c_init();
+ mtdcr(cntrl0,0x00002000); /* set IRQ6 as GPIO23 to generate an interrupt request to the PCP2PCI bridge */
+ out32(IBM405GP_GPIO0_OR, 0x60000000); /*fixme is SMB_INT high or low active??; IRQ6 is GPIO23 output*/
+ out32(IBM405GP_GPIO0_TCR, 0x7E400000);
return 0;
}
#ifndef CONFIG_ERIC
unsigned char dataout[1];
int i;
-#endif
unsigned char datain[128];
int TotalSize;
+#endif
#ifdef CONFIG_ERIC
printf("\n");
}
printf("\n");
-#endif
#endif
/*****************************/
/* return size in Mb unit => *(1024*1024) */
return (TotalSize*1024*1024);
+#endif
}
/* ------------------------------------------------------------------------- */
{
/* Setup offsets */
flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
-
+
/* Monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
- FLASH_BASE0_PRELIM,
- FLASH_BASE0_PRELIM+CFG_MONITOR_LEN-1,
+ FLASH_BASE0_PRELIM-CFG_MONITOR_LEN+size_b0,
+ FLASH_BASE0_PRELIM-1+size_b0,
&flash_info[0]);
size_b1 = 0 ;
flash_info[0].size = size_b0;
/* monitor protection ON by default */
(void)flash_protect(FLAG_PROTECT_SET,
- base_b0+size_b0-CFG_MONITOR_LEN,
- base_b0+size_b0-1,
+ base_b0+size_b0-CFG_MONITOR_LEN+size_b1,
+ base_b0+size_b0-1+size_b1,
&flash_info[0]);
if (size_b1) {
int i;
/* set up sector start adress table */
- if (info->flash_id & FLASH_BTYPE) {
+ if ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F320JA3 ||
+ (info->flash_id & FLASH_TYPEMASK) == FLASH_28F640JA3 ||
+ (info->flash_id & FLASH_TYPEMASK) == FLASH_28F128JA3) {
+ for (i = 0; i < info->sector_count; i++) {
+ info->start[i] = base + (i * info->size/info->sector_count);
+ }
+ } else if (info->flash_id & FLASH_BTYPE) {
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
#ifndef CFG_FLASH_16BIT
case FLASH_INTEL640T: printf ("INTEL28F640T (64 Mbit%s",boottype);
break;
#endif
+ case FLASH_28F320JA3: printf ("INTEL28F320JA3 (32 Mbit%s",boottype);
+ break;
+ case FLASH_28F640JA3: printf ("INTEL28F640JA3 (64 Mbit%s",boottype);
+ break;
+ case FLASH_28F128JA3: printf ("INTEL28F128JA3 (128 Mbit%s",boottype);
+ break;
default: printf ("Unknown Chip Type\n");
break;
info->size = 0x01000000;
break; /* => 16 MB */
#endif
- default:
- info->flash_id += FLASH_INTEL320T;
+ case (INTEL_ID_28F320JA3 & FLASH_ID_MASK):
+ info->flash_id += FLASH_28F320JA3;
info->sector_count = 32;
info->size = 0x00400000;
- break; /* => 4 MB */
- // FIXME
- // info->flash_id = FLASH_UNKNOWN;
- //return (0); /* => no or unknown flash */
+ break; /* => 32 MBit */
+ case (INTEL_ID_28F640JA3 & FLASH_ID_MASK):
+ info->flash_id += FLASH_28F640JA3;
+ info->sector_count = 64;
+ info->size = 0x00800000;
+ break; /* => 64 MBit */
+ case (INTEL_ID_28F128JA3 & FLASH_ID_MASK):
+ info->flash_id += FLASH_28F128JA3;
+ info->sector_count = 128;
+ info->size = 0x01000000;
+ break; /* => 128 MBit */
+ default:
+ /* FIXME*/
+ info->flash_id = FLASH_UNKNOWN;
+ return (0); /* => no or unknown flash */
}
- /* set up sector start adress table */
- if (info->flash_id & FLASH_BTYPE) {
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CFG_FLASH_16BIT
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00008000;
- info->start[3] = base + 0x0000C000;
- info->start[4] = base + 0x00010000;
- info->start[5] = base + 0x00014000;
- info->start[6] = base + 0x00018000;
- info->start[7] = base + 0x0001C000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x000E0000;
- }
- }
- else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00008000;
- info->start[2] = base + 0x0000C000;
- info->start[3] = base + 0x00010000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00020000) - 0x00060000;
- }
- }
-#else
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00002000;
- info->start[2] = base + 0x00004000;
- info->start[3] = base + 0x00006000;
- info->start[4] = base + 0x00008000;
- info->start[5] = base + 0x0000A000;
- info->start[6] = base + 0x0000C000;
- info->start[7] = base + 0x0000E000;
- for (i = 8; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00070000;
- }
- }
- else {
- /* set sector offsets for bottom boot block type */
- info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
- info->start[i] = base + (i * 0x00010000) - 0x00030000;
- }
- }
-#endif
- } else {
- /* set sector offsets for top boot block type */
- i = info->sector_count - 1;
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
-
-#ifndef CFG_FLASH_16BIT
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- info->start[i--] = base + info->size - 0x00014000;
- info->start[i--] = base + info->size - 0x00018000;
- info->start[i--] = base + info->size - 0x0001C000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
-
- } else {
-
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x00010000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00020000;
- }
- }
-#else
- info->start[i--] = base + info->size - 0x00002000;
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- info->start[i--] = base + info->size - 0x0000A000;
- info->start[i--] = base + info->size - 0x0000C000;
- info->start[i--] = base + info->size - 0x0000E000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
-
- } else {
-
- info->start[i--] = base + info->size - 0x00004000;
- info->start[i--] = base + info->size - 0x00006000;
- info->start[i--] = base + info->size - 0x00008000;
- for (; i >= 0; i--) {
- info->start[i] = base + i * 0x00010000;
- }
- }
-#endif
- }
+ flash_get_offsets(base, info);
/* check for protected sectors */
for (i = 0; i < info->sector_count; i++) {
/*-----------------------------------------------------------------------
*/
+
ppc/zlib.o (.text)
/* . = env_offset;*/
-/* common/environment.o(.text)*/
+ common/environment.o(.text)
*(.text)
*(.fixup)
{
int len, rc;
ulong end_addr;
+ uchar *flash_offset;
+ uchar *flash_sect_addr;
#if defined(CFG_ENV_SECT_SIZE) && (CFG_ENV_SECT_SIZE > CFG_ENV_SIZE)
+
uchar env_buffer[CFG_ENV_SECT_SIZE];
#else
uchar *env_buffer = (char *)env_ptr;
#endif /* CFG_ENV_SECT_SIZE */
+ flash_offset = (uchar *)(((unsigned long)flash_addr) & (CFG_ENV_SECT_SIZE-1));
+ flash_sect_addr = (uchar *)(((unsigned long)flash_addr) & ~(CFG_ENV_SECT_SIZE-1));
#if defined(CFG_ENV_SECT_SIZE) && (CFG_ENV_SECT_SIZE > CFG_ENV_SIZE)
/* copy old contents to temporary buffer */
- memcpy(env_buffer, flash_addr, CFG_ENV_SECT_SIZE);
+ memcpy(env_buffer, flash_sect_addr, CFG_ENV_SECT_SIZE);
/* copy current environment to temporary buffer */
- memcpy(env_buffer, env_ptr, CFG_ENV_SIZE);
+ memcpy((uchar *)((unsigned long)env_buffer + (unsigned long)flash_offset), env_ptr, CFG_ENV_SIZE);
len = CFG_ENV_SECT_SIZE;
#else
len = CFG_ENV_SIZE;
# endif /* CFG_ENV_SECT_SIZE */
- end_addr = (ulong)flash_addr + len - 1;
+ end_addr = (ulong)flash_sect_addr + len - 1;
- flash_sect_protect (0, (ulong)flash_addr, end_addr);
+ flash_sect_protect (0, (ulong)flash_sect_addr, end_addr);
printf ("Erasing Flash...");
- flash_sect_erase ((ulong)flash_addr, end_addr);
+ flash_sect_erase ((ulong)flash_sect_addr, end_addr);
printf ("Saving Environment to Flash...\n");
- switch (rc = flash_write(env_buffer, (ulong)flash_addr, len)) {
+ switch (rc = flash_write(env_buffer, (ulong)flash_sect_addr, len)) {
case 0: break;
case 1: printf ("Timeout writing to Flash\n");
break;
printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc);
}
- flash_sect_protect (1, (ulong)flash_addr, end_addr);
+ flash_sect_protect (1, (ulong)flash_sect_addr, end_addr);
}
#endif /* CFG_CMD_ENV + CFG_CMD_FLASH */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
-/*#define CFG_ENV_IS_IN_FLASH 1*/ /* use FLASH for environment vars */
+#if 1
+#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
+#endif
+#if 0
#define CFG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
-#define CONFIG_I2C 1 /* To enable I2C support for nvram */
+#endif
+#if 0
+#define CFG_ENV_IS_IN_EEPROM 1 /* use I2C RTC X1240 for environment vars */
+#define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */
+#define CFG_ENV_SIZE 0x800 /* 2048 bytes may be used for env vars */
+#endif /* total size of a X1240 is 2048 bytes */
+#define CONFIG_I2C_X 1 /* 16 bit access */
+#define CFG_I2C_EEPROM_ADDR 0x57 /* X1240 has two I2C slave addresses, one for EEPROM */
+#define CONFIG_I2C_RTC 1 /* we have a Xicor X1240 RTC */
+#define CFG_I2C_RTC_ADDR 0x6F /* and one for RTC */
+
+#ifdef CFG_ENV_IS_IN_FLASH
+#undef CFG_ENV_IS_IN_NVRAM
+#undef CFG_ENV_IS_IN_EEPROM
+#else
#ifdef CFG_ENV_IS_IN_NVRAM
#undef CFG_ENV_IS_IN_FLASH
+#undef CFG_ENV_IS_IN_EEPROM
#else
-#ifdef CFG_ENV_IS_IN_FLASH
+#ifdef CFG_ENV_IS_IN_EEPROM
#undef CFG_ENV_IS_IN_NVRAM
+#undef CFG_ENV_IS_IN_FLASH
#endif
#endif
+#endif
+
+#undef CONFIG_I2C /* To enable I2C support for nvram */
#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
#define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */
#endif
-#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/nfs " \
- "nfsroot=192.168.1.24:/eric_root_devel " \
- "ip=192.168.1.20:192.168.1.24"
+#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/nfs " \
+ "nfsroot=192.168.1.2:/eric_root_devel " \
+ "ip=192.168.1.22:192.168.1.2"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
CFG_CMD_PCI | \
CFG_CMD_IRQ | \
- CFG_CMD_KGDB | \
- CFG_CMD_I2C)
+ CFG_CMD_ENV | \
+ CFG_CMD_FLASH)
+
+/*
+ * #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | \
+ * CFG_CMD_KGDB | CFG_CMD_I2C | CFG_CMD_EEPROM | \
+ * CFG_CMD_ENV | CFG_CMD_FLASH)
+ */
/* CFG_CMD_ENV est definie */
/* ((CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | CFG_CMD_KGDB) & ~(CFG_CMD_ENV))
-*/
+ */
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
*/
-#define CFG_LONGHELP /* undef to save memory */
+#undef CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#define CFG_SDRAM_SINGLE_BANK 1
#ifdef CFG_SDRAM_MANUALLY
-/* ------------------------------------------------------------------- */
-/* Set MB0CF for bank 0. (0-32MB) Address Mode 4 since 12x8(2) */
-/* ------------------------------------------------------------------- */
+/*-----------------------------------------------------------------------
+ * Set MB0CF for bank 0. (0-32MB) Address Mode 4 since 12x8(2)
+ *----------------------------------------------------------------------*/
#define MB0CF 0x00062001 /* 32MB @ 0 */
-/* ------------------------------------------------------------------- */
-/* Set MB1CF for bank 1. (32MB-64MB) Address Mode 4 since 12x8(2) */
-/* ------------------------------------------------------------------- */
+/*-----------------------------------------------------------------------
+ * Set MB1CF for bank 1. (32MB-64MB) Address Mode 4 since 12x8(2)
+ *----------------------------------------------------------------------*/
#ifdef CFG_SDRAM_SINGLE_BANK
-#define MB1CF 0x0 /* 0MB @ 32MB */
+#define MB1CF 0x0 /* 0MB @ 32MB */
#else
#define MB1CF 0x02062001 /* 32MB @ 32MB */
#endif
-/* ------------------------------------------------------------------- */
-/* Set MB2CF for bank 2. off */
-/* ------------------------------------------------------------------- */
-#define MB2CF 0x0 /* 0MB */
-/* ------------------------------------------------------------------- */
-/* Set MB3CF for bank 3. off */
-/* ------------------------------------------------------------------- */
-#define MB3CF 0x0 /* 0MB */
+/*-----------------------------------------------------------------------
+ * Set MB2CF for bank 2. off
+ *----------------------------------------------------------------------*/
+#define MB2CF 0x0 /* 0MB */
+/*-----------------------------------------------------------------------
+ * Set MB3CF for bank 3. off
+ *----------------------------------------------------------------------*/
+#define MB3CF 0x0 /* 0MB */
-#define SDTR_100 0x0086400D
-#define RTR_100 0x05F0
-#define SDTR_66 0x00854006 /* orig ppcboot-wallnut says 0x00854006 */
-#define RTR_66 0x03f8
+#define SDTR_100 0x0086400D
+#define RTR_100 0x05F0
+#define SDTR_66 0x00854006 /* orig ppcboot-wallnut says 0x00854006 */
+#define RTR_66 0x03f8
-#endif /* CFG_SDRAM_MANUALLY */
+#endif /* CFG_SDRAM_MANUALLY */
/*-----------------------------------------------------------------------
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_SDRAM_SIZE 32
-#define CFG_FLASH_BASE 0xFFC00000 /* 4 MByte Flash */
-#define CFG_MONITOR_BASE 0xFFF80000 /* last 512kByte within Flash */
-#define CFG_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
+#define CFG_FLASH_BASE 0xFF800000 /* 8 MByte Flash */
+#define CFG_MONITOR_BASE 0xFFFE0000 /* last 128kByte within Flash */
+/*#define CFG_MONITOR_LEN (192 * 1024)*/ /* Reserve 196 kB for Monitor */
+#define CFG_MONITOR_LEN (128 * 1024) /* Reserve 128 kB for Monitor */
#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
/*
* FLASH organization
*/
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 32 /* max number of sectors on one chip */
+#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
#define CFG_FLASH_16BIT 1 /* Rom 16 bit data bus */
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
/* BEG ENVIRONNEMENT FLASH */
-#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_OFFSET 0x00060000 /* Offset of Environment Sector */
-#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector 128k */
-#define CFG_ENV_SECT_SIZE 0x20000 /* see README - env sector total size */
+#ifdef CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_SECT_SIZE (128*1024)
+
+#if 0 /* force ENV to be NOT embedded */
+#define CFG_ENV_ADDR 0xfffa0000
+#else /* force ENV to be embedded */
+#define CFG_ENV_SIZE (2 * 1024) /* Total Size of Environment Sector 2k */
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN - CFG_ENV_SIZE - 0x10) /* let space for reset vector */
+/* #define CFG_ENV_ADDR (CFG_MONITOR_BASE)*/ /* let space for reset vector */
+#define CFG_ENV_OFFSET (CFG_ENV_ADDR - CFG_FLASH_BASE)
+#endif
+
#endif
/* END ENVIRONNEMENT FLASH */
/*-----------------------------------------------------------------------
* NVRAM organization
*/
-#define CFG_NVRAM_BASE_ADDR CFG_NVRAM_REG_BASE_ADDR /* NVRAM base address */
-#define CFG_NVRAM_SIZE 0x7F8 /* NVRAM size 2kByte - 8 Byte for RTC */
+#define CFG_NVRAM_BASE_ADDR CFG_NVRAM_REG_BASE_ADDR /* NVRAM base address */
+#define CFG_NVRAM_SIZE 0x7F8 /* NVRAM size 2kByte - 8 Byte for RTC */
-#ifdef CFG_ENV_IS_IN_NVRAM
-#define CFG_ENV_SIZE 0x7F8 /* Size of Environment vars */
+#ifdef CFG_ENV_IS_IN_NVRAM
+#define CFG_ENV_SIZE 0x7F8 /* Size of Environment vars */
#define CFG_ENV_ADDR \
(CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE) /* Env */
#endif
* BR0/1 and OR0/1 (FLASH)
*/
-#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 4MB */
+#define FLASH_BASE0_PRELIM 0xFF800000 /* FLASH bank #0 8MB */
#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
projects / users / rw / ppcboot.git / commitdiff