openocd: fix conversion string for stdint values

Detected while converting 'unsigned' to 'unsigned int'.

Use the correct conversion string for stdint values.

Change-Id: I99f3dff4c64dfd7acf2bddb130b56e9ebe1e6c60
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8477
Tested-by: jenkins

diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c
index bfbba67c4cbf7236f18b903b3ab4490c72b3b41d..9c8d5e2a3dd13b1b5cec2f34dad7bf5c54c9523f 100644 (file)
--- a/src/flash/nand/at91sam9.c
+++ b/src/flash/nand/at91sam9.c
@@ -389,9 +389,8 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
                                uint32_t bit = parity & 0x0F;
 
                                data[word] ^= (0x1) << bit;
-                               LOG_INFO("Data word %d, bit %d corrected.",
-                                       (unsigned) word,
-                                       (unsigned) bit);
+                               LOG_INFO("Data word %" PRIu32 ", bit %" PRIu32 " corrected.",
+                                       word, bit);
                        }
                }
 

diff --git a/src/flash/nand/lpc3180.c b/src/flash/nand/lpc3180.c
index c1af1d737233371d42c73d994879d3b59a6b8de2..8e660a06809154803f9038d232f6726656739d8e 100644 (file)
--- a/src/flash/nand/lpc3180.c
+++ b/src/flash/nand/lpc3180.c
@@ -890,8 +890,7 @@ static int lpc3180_read_page(struct nand_device *nand,
 
                        if (mlc_isr & 0x8) {
                                if (mlc_isr & 0x40) {
-                                       LOG_ERROR("uncorrectable error detected: 0x%2.2x",
-                                               (unsigned)mlc_isr);
+                                       LOG_ERROR("uncorrectable error detected: 0x%2.2" PRIx32, mlc_isr);
                                        free(page_buffer);
                                        free(oob_buffer);
                                        return ERROR_NAND_OPERATION_FAILED;

diff --git a/src/flash/nand/lpc32xx.c b/src/flash/nand/lpc32xx.c
index 1fdae9fe5398ad5eece9fdee33fba5fe39a93641..89a00a9e300d04e6837f588d8e19b1a97c3124c2 100644 (file)
--- a/src/flash/nand/lpc32xx.c
+++ b/src/flash/nand/lpc32xx.c
@@ -1386,8 +1386,7 @@ static int lpc32xx_read_page_mlc(struct nand_device *nand, uint32_t page,
 
                if (mlc_isr & 0x8) {
                        if (mlc_isr & 0x40) {
-                               LOG_ERROR("uncorrectable error detected: "
-                                       "0x%2.2x", (unsigned)mlc_isr);
+                               LOG_ERROR("uncorrectable error detected: 0x%2.2" PRIx32, mlc_isr);
                                return ERROR_NAND_OPERATION_FAILED;
                        }
 

diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index b1cb8f110e842126f18f9aa608fdcff21db71dd8..8e8497eb0dd4a493aece0530be4188504704f5a0 100644 (file)
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -2051,7 +2051,7 @@ do_retry:
                case AT91C_EFC_FCMD_CLB:
                        n = (private->size_bytes / private->page_size);
                        if (argument >= n)
-                               LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
+                               LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n);
                        break;
 
                case AT91C_EFC_FCMD_SFB:
@@ -2867,8 +2867,8 @@ static int sam3_read_this_reg(struct sam3_chip *chip, uint32_t *goes_here)
 
        r = target_read_u32(chip->target, reg->address, goes_here);
        if (r != ERROR_OK) {
-               LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Err: %d",
-                       reg->name, (unsigned)(reg->address), r);
+               LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08" PRIx32 ", Err: %d",
+                       reg->name, reg->address, r);
        }
        return r;
 }
@@ -2883,8 +2883,8 @@ static int sam3_read_all_regs(struct sam3_chip *chip)
                r = sam3_read_this_reg(chip,
                                sam3_get_reg_ptr(&(chip->cfg), reg));
                if (r != ERROR_OK) {
-                       LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08x, Error: %d",
-                               reg->name, ((unsigned)(reg->address)), r);
+                       LOG_ERROR("Cannot read SAM3 register: %s @ 0x%08" PRIx32 ", Error: %d",
+                               reg->name, reg->address, r);
                        return r;
                }
                reg++;

diff --git a/src/flash/nor/at91sam4.c b/src/flash/nor/at91sam4.c
index 62127530f1ef1f4c9f075877a7e85d464783c703..31ae35ccd47516b3014c5a866a4649ed48432396 100644 (file)
--- a/src/flash/nor/at91sam4.c
+++ b/src/flash/nor/at91sam4.c
@@ -1501,7 +1501,7 @@ do_retry:
                case AT91C_EFC_FCMD_CLB:
                        n = (private->size_bytes / private->page_size);
                        if (argument >= n)
-                               LOG_ERROR("*BUG*: Embedded flash has only %u pages", (unsigned)(n));
+                               LOG_ERROR("*BUG*: Embedded flash has only %" PRIu32 " pages", n);
                        break;
 
                case AT91C_EFC_FCMD_SFB:
@@ -2374,8 +2374,8 @@ static int sam4_read_this_reg(struct sam4_chip *chip, uint32_t *goes_here)
 
        r = target_read_u32(chip->target, reg->address, goes_here);
        if (r != ERROR_OK) {
-               LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Err: %d",
-                       reg->name, (unsigned)(reg->address), r);
+               LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08" PRIx32 ", Err: %d",
+                       reg->name, reg->address, r);
        }
        return r;
 }
@@ -2390,8 +2390,8 @@ static int sam4_read_all_regs(struct sam4_chip *chip)
                r = sam4_read_this_reg(chip,
                                sam4_get_reg_ptr(&(chip->cfg), reg));
                if (r != ERROR_OK) {
-                       LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08x, Error: %d",
-                               reg->name, ((unsigned)(reg->address)), r);
+                       LOG_ERROR("Cannot read SAM4 register: %s @ 0x%08" PRIx32 ", Error: %d",
+                               reg->name, reg->address, r);
                        return r;
                }
                reg++;

diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c
index 78bc91e7d02d93a668cebdc95658258a18ea2e4f..96bd7353ff19f1ba67b20fb4c0d86090b218a04e 100644 (file)
--- a/src/flash/nor/cfi.c
+++ b/src/flash/nor/cfi.c
@@ -2219,8 +2219,7 @@ static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, u
        uint8_t current_word[CFI_MAX_BUS_WIDTH];
        int retval;
 
-       LOG_DEBUG("reading buffer of %i byte at 0x%8.8x",
-               (int)count, (unsigned)offset);
+       LOG_DEBUG("reading buffer of %" PRIi32 " byte at 0x%8.8" PRIx32, count, offset);
 
        if (bank->target->state != TARGET_HALTED) {
                LOG_ERROR("Target not halted");

diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c
index 59a14af8b8ee4139f99bf7bb326e9ff024aadd34..052a42d2359aa34710361c710af4c2d07254c3f2 100644 (file)
--- a/src/flash/nor/max32xxx.c
+++ b/src/flash/nor/max32xxx.c
@@ -388,8 +388,8 @@ static int max32xxx_write_block(struct flash_bank *bank, const uint8_t *buffer,
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
 
-               LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
-                       target_name(target), (unsigned) buffer_size);
+               LOG_DEBUG("retry target_alloc_working_area(%s, size=%" PRIu32 ")",
+                       target_name(target), buffer_size);
        }
 
        target_write_buffer(target, write_algorithm->address, sizeof(write_code),

diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index eab6244d43c11879f96d6f2e8875b54c226e90c1..25bc5507ad3b31cb0f2e5f7ddae4f2f34b36d173 100644 (file)
--- a/src/flash/nor/stellaris.c
+++ b/src/flash/nor/stellaris.c
@@ -1056,8 +1056,8 @@ static int stellaris_write_block(struct flash_bank *bank,
                        target_free_working_area(target, write_algorithm);
                        return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
                }
-               LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
-                               target_name(target), (unsigned) buffer_size);
+               LOG_DEBUG("retry target_alloc_working_area(%s, size=%" PRIu32 ")",
+                               target_name(target), buffer_size);
        }
 
        target_write_buffer(target, write_algorithm->address,

diff --git a/src/flash/nor/tms470.c b/src/flash/nor/tms470.c
index e01d2df0a50122fc4b42fe26b6b884e087e29135..6e0ea5b9500beb8423fe3365bbf5ba7642ceaf40 100644 (file)
--- a/src/flash/nor/tms470.c
+++ b/src/flash/nor/tms470.c
@@ -239,8 +239,8 @@ static int tms470_read_part_info(struct flash_bank *bank)
                        break;
 
                default:
-                       LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.",
-                                       (unsigned)part_number);
+                       LOG_WARNING("Could not identify part 0x%02" PRIx32 " as a member of the TMS470 family.",
+                                       part_number);
                        return ERROR_FLASH_OPERATION_FAILED;
        }
 

diff --git a/src/jtag/core.c b/src/jtag/core.c
index a6f38a19dda88e80d4e4715ffeac76783d792ef5..6515d716099630e886ef770abd86f9e4d0db35d1 100644 (file)
--- a/src/jtag/core.c
+++ b/src/jtag/core.c
@@ -1473,10 +1473,9 @@ void jtag_tap_init(struct jtag_tap *tap)
        jtag_tap_add(tap);
 
        LOG_DEBUG("Created Tap: %s @ abs position %u, "
-                       "irlen %u, capture: 0x%x mask: 0x%x", tap->dotted_name,
+                       "irlen %u, capture: 0x%" PRIx32 " mask: 0x%" PRIx32, tap->dotted_name,
                        tap->abs_chain_position, tap->ir_length,
-                       (unsigned) tap->ir_capture_value,
-                       (unsigned) tap->ir_capture_mask);
+                       tap->ir_capture_value, tap->ir_capture_mask);
 }
 
 void jtag_tap_free(struct jtag_tap *tap)

diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c
index 624b4e4c2a713168337dbfdc31b59d27e659b741..e2b3b45a6001f5798825a38024c11af3b89254d9 100644 (file)
--- a/src/jtag/tcl.c
+++ b/src/jtag/tcl.c
@@ -803,10 +803,8 @@ COMMAND_HANDLER(handle_scan_chain_command)
        while (tap) {
                uint32_t expected, expected_mask, ii;
 
-               snprintf(expected_id, sizeof(expected_id), "0x%08x",
-                       (unsigned)((tap->expected_ids_cnt > 0)
-                                  ? tap->expected_ids[0]
-                                  : 0));
+               snprintf(expected_id, sizeof(expected_id), "0x%08" PRIx32,
+                       (tap->expected_ids_cnt > 0) ? tap->expected_ids[0] : 0);
                if (tap->ignore_version)
                        expected_id[2] = '*';
 
@@ -825,8 +823,7 @@ COMMAND_HANDLER(handle_scan_chain_command)
                        (unsigned int)(expected_mask));
 
                for (ii = 1; ii < tap->expected_ids_cnt; ii++) {
-                       snprintf(expected_id, sizeof(expected_id), "0x%08x",
-                               (unsigned) tap->expected_ids[ii]);
+                       snprintf(expected_id, sizeof(expected_id), "0x%08" PRIx32, tap->expected_ids[ii]);
                        if (tap->ignore_version)
                                expected_id[2] = '*';
 

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 50aaa86f12873eafdf8f0511799a108d3651f9de..43790c737b98f00298a8dc9bed026bb50eb7c1e7 100644 (file)
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -43,7 +43,7 @@ static int arm11_check_init(struct arm11_common *arm11)
        CHECK_RETVAL(arm11_read_dscr(arm11));
 
        if (!(arm11->dscr & DSCR_HALT_DBG_MODE)) {
-               LOG_DEBUG("DSCR %08x", (unsigned) arm11->dscr);
+               LOG_DEBUG("DSCR %08" PRIx32, arm11->dscr);
                LOG_DEBUG("Bringing target into debug mode");
 
                arm11->dscr |= DSCR_HALT_DBG_MODE;
@@ -241,8 +241,7 @@ static int arm11_leave_debug_state(struct arm11_common *arm11, bool bpwp)
                        registers hold data that was written by one side (CPU or JTAG) and not
                        read out by the other side.
                        */
-                       LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08x)",
-                               (unsigned) arm11->dscr);
+                       LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08" PRIx32 ")", arm11->dscr);
                        return ERROR_FAIL;
                }
        }
@@ -516,7 +515,7 @@ static int arm11_resume(struct target *target, int current,
        while (1) {
                CHECK_RETVAL(arm11_read_dscr(arm11));
 
-               LOG_DEBUG("DSCR %08x", (unsigned) arm11->dscr);
+               LOG_DEBUG("DSCR %08" PRIx32, arm11->dscr);
 
                if (arm11->dscr & DSCR_CORE_RESTARTED)
                        break;
@@ -662,7 +661,7 @@ static int arm11_step(struct target *target, int current,
                                | DSCR_CORE_HALTED;
 
                        CHECK_RETVAL(arm11_read_dscr(arm11));
-                       LOG_DEBUG("DSCR %08x e", (unsigned) arm11->dscr);
+                       LOG_DEBUG("DSCR %08" PRIx32 " e", arm11->dscr);
 
                        if ((arm11->dscr & mask) == mask)
                                break;
@@ -1012,10 +1011,8 @@ static int arm11_write_memory_inner(struct target *target,
                        return retval;
 
                if (address + size * count != r0) {
-                       LOG_ERROR("Data transfer failed. Expected end "
-                               "address 0x%08x, got 0x%08x",
-                               (unsigned) (address + size * count),
-                               (unsigned) r0);
+                       LOG_ERROR("Data transfer failed. Expected end address 0x%08" PRIx32 ", got 0x%08" PRIx32,
+                               address + size * count, r0);
 
                        if (burst)
                                LOG_ERROR(

diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index b670bd7f7869d0b639d415e387a89b44af83f009..b66f8861835016c648f39746daf60aa9ba1f840e 100644 (file)
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -242,7 +242,7 @@ int arm11_add_debug_scan_n(struct arm11_common *arm11,
 static void arm11_add_debug_inst(struct arm11_common *arm11,
        uint32_t inst, uint8_t *flag, tap_state_t state)
 {
-       JTAG_DEBUG("INST <= 0x%08x", (unsigned) inst);
+       JTAG_DEBUG("INST <= 0x%08" PRIx32, inst);
 
        struct scan_field itr[2];
 
@@ -282,9 +282,7 @@ int arm11_read_dscr(struct arm11_common *arm11)
        CHECK_RETVAL(jtag_execute_queue());
 
        if (arm11->dscr != dscr)
-               JTAG_DEBUG("DSCR  = %08x (OLD %08x)",
-                       (unsigned) dscr,
-                       (unsigned) arm11->dscr);
+               JTAG_DEBUG("DSCR  = %08" PRIx32 " (OLD %08" PRIx32 ")", dscr, arm11->dscr);
 
        arm11->dscr = dscr;
 
@@ -317,9 +315,7 @@ int arm11_write_dscr(struct arm11_common *arm11, uint32_t dscr)
 
        CHECK_RETVAL(jtag_execute_queue());
 
-       JTAG_DEBUG("DSCR <= %08x (OLD %08x)",
-               (unsigned) dscr,
-               (unsigned) arm11->dscr);
+       JTAG_DEBUG("DSCR <= %08" PRIx32 " (OLD %08" PRIx32 ")", dscr, arm11->dscr);
 
        arm11->dscr = dscr;
 
@@ -509,8 +505,8 @@ int arm11_run_instr_data_to_core(struct arm11_common *arm11,
 
                CHECK_RETVAL(jtag_execute_queue());
 
-               JTAG_DEBUG("DTR  _data %08x  ready %d  n_retry %d",
-                       (unsigned) _data, ready, n_retry);
+               JTAG_DEBUG("DTR  _data %08" PRIx32 "  ready %d  n_retry %d",
+                       _data, ready, n_retry);
 
                int64_t then = 0;
 
@@ -754,8 +750,8 @@ int arm11_run_instr_data_from_core(struct arm11_common *arm11,
 
                        CHECK_RETVAL(jtag_execute_queue());
 
-                       JTAG_DEBUG("DTR  _data %08x  ready %d  n_retry %d",
-                               (unsigned) _data, ready, n_retry);
+                       JTAG_DEBUG("DTR  _data %08" PRIx32 "  ready %d  n_retry %d",
+                               _data, ready, n_retry);
 
                        int64_t then = 0;
 
@@ -878,9 +874,8 @@ int arm11_sc7_run(struct arm11_common *arm11, struct arm11_sc7_action *actions,
                /* Timeout here so we don't get stuck. */
                int i_n = 0;
                while (1) {
-                       JTAG_DEBUG("SC7 <= c%-3d Data %08x %s",
-                               (unsigned) address_out,
-                               (unsigned) data_out,
+                       JTAG_DEBUG("SC7 <= c%-3" PRIu8 " Data %08" PRIx32 " %s",
+                               address_out, data_out,
                                n_rw ? "write" : "read");
 
                        arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain7_fields),
@@ -908,7 +903,7 @@ int arm11_sc7_run(struct arm11_common *arm11, struct arm11_sc7_action *actions,
                }
 
                if (!n_rw)
-                       JTAG_DEBUG("SC7 => Data %08x", (unsigned) data_in);
+                       JTAG_DEBUG("SC7 => Data %08" PRIx32, data_in);
 
                if (i > 0) {
                        if (actions[i - 1].address != address_in)

diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index 749274f3690d4f0edbb8adaab4ef6a8a2e0fdd66..5c52ad89906f8a6c7da781f38b31940605e99ed8 100644 (file)
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -266,18 +266,18 @@ static int evaluate_srs(uint32_t opcode,
                case 0x08400000:
                        snprintf(instruction->text, 128, "0x%8.8" PRIx32
                                "\t0x%8.8" PRIx32
-                               "\tSRS%s\tSP%s, #%d",
+                               "\tSRS%s\tSP%s, #%" PRIu32,
                                address, opcode,
                                mode, wback,
-                               (unsigned)(opcode & 0x1f));
+                               opcode & 0x1f);
                        break;
                case 0x08100000:
                        snprintf(instruction->text, 128, "0x%8.8" PRIx32
                                "\t0x%8.8" PRIx32
-                               "\tRFE%s\tr%d%s",
+                               "\tRFE%s\tr%" PRIu32 "%s",
                                address, opcode,
                                mode,
-                               (unsigned)((opcode >> 16) & 0xf), wback);
+                               (opcode >> 16) & 0xf, wback);
                        break;
                default:
                        return evaluate_unknown(opcode, address, instruction);
@@ -842,7 +842,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
        /* halfword pack */
        if ((opcode & 0x01f00020) == 0x00800000) {
                char *type, *shift;
-               unsigned imm = (unsigned) (opcode >> 7) & 0x1f;
+               unsigned int imm = (opcode >> 7) & 0x1f;
 
                if (opcode & (1 << 6)) {
                        type = "TB";
@@ -865,7 +865,7 @@ static int evaluate_media(uint32_t opcode, uint32_t address,
        /* word saturate */
        if ((opcode & 0x01a00020) == 0x00a00000) {
                char *shift;
-               unsigned imm = (unsigned) (opcode >> 7) & 0x1f;
+               unsigned int imm = (opcode >> 7) & 0x1f;
 
                if (opcode & (1 << 6)) {
                        shift = "ASR";
@@ -2046,8 +2046,7 @@ int arm_evaluate_opcode(uint32_t opcode, uint32_t address,
                        return evaluate_cdp_mcr_mrc(opcode, address, instruction);
        }
 
-       LOG_ERROR("ARM: should never reach this point (opcode=%08x)",
-                       (unsigned) opcode);
+       LOG_ERROR("ARM: should never reach this point (opcode=%08" PRIx32 ")", opcode);
        return -1;
 }
 

diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 9f3a444afc5dae407e5c8a03783ef666b02e7107..94e91ad6cdd71ed58e29ffa63872c59b02f9c9ba 100644 (file)
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -198,8 +198,7 @@ static int dpm_read_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
                buf_set_u32(r->value + 4, 0, 32, value_r1);
                r->valid = true;
                r->dirty = false;
-               LOG_DEBUG("READ: %s, %8.8x, %8.8x", r->name,
-                               (unsigned) value_r0, (unsigned) value_r1);
+               LOG_DEBUG("READ: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1);
        }
 
        return retval;
@@ -266,7 +265,7 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
                buf_set_u32(r->value, 0, 32, value);
                r->valid = true;
                r->dirty = false;
-               LOG_DEBUG("READ: %s, %8.8x", r->name, (unsigned) value);
+               LOG_DEBUG("READ: %s, %8.8" PRIx32, r->name, value);
        }
 
        return retval;
@@ -302,8 +301,7 @@ static int dpm_write_reg_u64(struct arm_dpm *dpm, struct reg *r, unsigned regnum
 
        if (retval == ERROR_OK) {
                r->dirty = false;
-               LOG_DEBUG("WRITE: %s, %8.8x, %8.8x", r->name,
-                               (unsigned) value_r0, (unsigned) value_r1);
+               LOG_DEBUG("WRITE: %s, %8.8" PRIx32 ", %8.8" PRIx32, r->name, value_r0, value_r1);
        }
 
        return retval;
@@ -351,7 +349,7 @@ static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 
        if (retval == ERROR_OK) {
                r->dirty = false;
-               LOG_DEBUG("WRITE: %s, %8.8x", r->name, (unsigned) value);
+               LOG_DEBUG("WRITE: %s, %8.8" PRIx32, r->name, value);
        }
 
        return retval;

diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 1886d5e1f6a612847402446d7dd40cfe44e2e12a..ae89762e11e598fd76753bcbabe7daf9fece9dd6 100644 (file)
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -482,7 +482,7 @@ void arm_set_cpsr(struct arm *arm, uint32_t cpsr)
        }
        arm->core_state = state;
 
-       LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr,
+       LOG_DEBUG("set CPSR %#8.8" PRIx32 ": %s mode, %s state", cpsr,
                arm_mode_name(mode),
                arm_state_strings[arm->core_state]);
 }

diff --git a/src/target/armv8.c b/src/target/armv8.c
index b54ef13d378e28780c739503e4c7087dbee4456a..3e0ea0b75493ab4e8e560371420287527710b2f7 100644 (file)
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -961,7 +961,7 @@ void armv8_set_cpsr(struct arm *arm, uint32_t cpsr)
        arm->core_state = state;
        arm->core_mode = mode;
 
-       LOG_DEBUG("set CPSR %#8.8x: %s mode, %s state", (unsigned) cpsr,
+       LOG_DEBUG("set CPSR %#8.8" PRIx32 ": %s mode, %s state", cpsr,
                armv8_mode_name(arm->core_mode),
                armv8_state_strings[arm->core_state]);
 }

diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 271bd91c3b123ad938ebce688370212188f23f30..bcecedc9da96f45e96fc8251c108cbe26cf6fca3 100644 (file)
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -441,8 +441,7 @@ static int dpmv8_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
        vr += 16 * index_t;
        cr += 16 * index_t;
 
-       LOG_DEBUG("A8: bpwp enable, vr %08x cr %08x",
-               (unsigned) vr, (unsigned) cr);
+       LOG_DEBUG("A8: bpwp enable, vr %08" PRIx32 " cr %08" PRIx32, vr, cr);
 
        retval = mem_ap_write_atomic_u32(armv8->debug_ap, vr, addr);
        if (retval != ERROR_OK)
@@ -469,7 +468,7 @@ static int dpmv8_bpwp_disable(struct arm_dpm *dpm, unsigned index_t)
        }
        cr += 16 * index_t;
 
-       LOG_DEBUG("A: bpwp disable, cr %08x", (unsigned) cr);
+       LOG_DEBUG("A: bpwp disable, cr %08" PRIx32, cr);
 
        /* clear control register */
        return mem_ap_write_atomic_u32(armv8->debug_ap, cr, 0);

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 2de77c96020b9b496592eecddea59edb36d6abd0..498a9cd16a0969b0e3ea5f62da43b5725c8e42de 100644 (file)
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -595,8 +595,7 @@ static int cortex_a_bpwp_enable(struct arm_dpm *dpm, unsigned index_t,
        vr += 4 * index_t;
        cr += 4 * index_t;
 
-       LOG_DEBUG("A: bpwp enable, vr %08x cr %08x",
-               (unsigned) vr, (unsigned) cr);
+       LOG_DEBUG("A: bpwp enable, vr %08" PRIx32 " cr %08" PRIx32, vr, cr);
 
        retval = mem_ap_write_atomic_u32(a->armv7a_common.debug_ap,
                        vr, addr);
@@ -625,7 +624,7 @@ static int cortex_a_bpwp_disable(struct arm_dpm *dpm, unsigned index_t)
        }
        cr += 4 * index_t;
 
-       LOG_DEBUG("A: bpwp disable, cr %08x", (unsigned) cr);
+       LOG_DEBUG("A: bpwp disable, cr %08" PRIx32, cr);
 
        /* clear control register */
        return mem_ap_write_atomic_u32(a->armv7a_common.debug_ap, cr, 0);

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 3b95b648ef9f72f326568dbf1ef1126e5a966f34..698a6868cb755303b7d9bf4a72242c42dacd8290 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -2081,11 +2081,9 @@ static int cortex_m_set_watchpoint(struct target *target, struct watchpoint *wat
        target_write_u32(target, comparator->dwt_comparator_address + 8,
                comparator->function);
 
-       LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%d 0x%08x 0x%x 0x%05x",
+       LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%d 0x%08" PRIx32 " 0x%" PRIx32 " 0x%05" PRIx32,
                watchpoint->unique_id, dwt_num,
-               (unsigned) comparator->comp,
-               (unsigned) comparator->mask,
-               (unsigned) comparator->function);
+               comparator->comp, comparator->mask, comparator->function);
        return ERROR_OK;
 }
 
@@ -2102,9 +2100,9 @@ static int cortex_m_unset_watchpoint(struct target *target, struct watchpoint *w
 
        unsigned int dwt_num = watchpoint->number;
 
-       LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%u address: 0x%08x clear",
+       LOG_TARGET_DEBUG(target, "Watchpoint (ID %d) DWT%u address: " TARGET_ADDR_FMT " clear",
                watchpoint->unique_id, dwt_num,
-               (unsigned) watchpoint->address);
+               watchpoint->address);
 
        if (dwt_num >= cortex_m->dwt_num_comp) {
                LOG_TARGET_DEBUG(target, "Invalid DWT Comparator number in watchpoint");

diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index 80cca1ed5098d7110dcb7e0e8bf64376ec86f8cc..687821c5d7efce7adfd27e136c7d08cf2e057947 100644 (file)
--- a/src/target/dsp563xx.c
+++ b/src/target/dsp563xx.c
@@ -1135,7 +1135,7 @@ static int dsp563xx_resume(struct target *target,
                current = 0;
        }
 
-       LOG_DEBUG("%s %08X %08X", __func__, current, (unsigned) address);
+       LOG_DEBUG("%s %08X %08" TARGET_PRIXADDR, __func__, current, address);
 
        err = dsp563xx_restore_context(target);
        if (err != ERROR_OK)
@@ -1199,7 +1199,7 @@ static int dsp563xx_step_ex(struct target *target,
                current = 0;
        }
 
-       LOG_DEBUG("%s %08X %08X", __func__, current, (unsigned) address);
+       LOG_DEBUG("%s %08X %08" PRIX32, __func__, current, address);
 
        err = dsp563xx_jtag_debug_request(target);
        if (err != ERROR_OK)
@@ -1260,15 +1260,15 @@ static int dsp563xx_step_ex(struct target *target,
                        err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABFR, &dr_in);
                        if (err != ERROR_OK)
                                return err;
-                       LOG_DEBUG("fetch: %08X", (unsigned) dr_in&0x00ffffff);
+                       LOG_DEBUG("fetch: %08" PRIX32, dr_in & 0x00ffffff);
                        err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABDR, &dr_in);
                        if (err != ERROR_OK)
                                return err;
-                       LOG_DEBUG("decode: %08X", (unsigned) dr_in&0x00ffffff);
+                       LOG_DEBUG("decode: %08" PRIX32, dr_in & 0x00ffffff);
                        err = dsp563xx_once_reg_read(target->tap, 1, DSP563XX_ONCE_OPABEX, &dr_in);
                        if (err != ERROR_OK)
                                return err;
-                       LOG_DEBUG("execute: %08X", (unsigned) dr_in&0x00ffffff);
+                       LOG_DEBUG("execute: %08" PRIX32, dr_in & 0x00ffffff);
 
                        /* reset trace mode */
                        err = dsp563xx_once_reg_write(target->tap, 1, DSP563XX_ONCE_OSCR, 0x000000);

diff --git a/src/target/etm.c b/src/target/etm.c
index d083017f71308d43292300d64275bb4a7cdd800d..d8f2a2faa29223d0c5d0e5ea4006a6b114a2095f 100644 (file)
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -320,9 +320,8 @@ struct reg_cache *etm_build_reg_cache(struct target *target,
                etm_reg_add(0x20, jtag_info, reg_cache, arch_info,
                        etm_core + 1, 1);
                etm_get_reg(reg_list + 1);
-               etm_ctx->id = buf_get_u32(
-                               arch_info[1].value, 0, 32);
-               LOG_DEBUG("ETM ID: %08x", (unsigned) etm_ctx->id);
+               etm_ctx->id = buf_get_u32(arch_info[1].value, 0, 32);
+               LOG_DEBUG("ETM ID: %08" PRIx32, etm_ctx->id);
                bcd_vers = 0x10 + (((etm_ctx->id) >> 4) & 0xff);
 
        } else {
@@ -1495,7 +1494,7 @@ COMMAND_HANDLER(handle_etm_info_command)
        etm_get_reg(etm_sys_config_reg);
        config = buf_get_u32(etm_sys_config_reg->value, 0, 32);
 
-       LOG_DEBUG("ETM SYS CONFIG %08x", (unsigned) config);
+       LOG_DEBUG("ETM SYS CONFIG %08" PRIx32, config);
 
        max_port_size = config & 0x7;
        if (etm->bcd_vers >= 0x30)

diff --git a/src/target/target.c b/src/target/target.c
index 9d1d2f55072f74bcc21cf00d162cfb5a95e02de2..c3a4ed6d2734bdeaeb8d058e594cfb3d8d1a219d 100644 (file)
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -3851,11 +3851,11 @@ static COMMAND_HELPER(handle_verify_image_command_internal, enum verify_mode ver
                                        for (t = 0; t < buf_cnt; t++) {
                                                if (data[t] != buffer[t]) {
                                                        command_print(CMD,
-                                                                                 "diff %d address 0x%08x. Was 0x%02x instead of 0x%02x",
-                                                                                 diffs,
-                                                                                 (unsigned)(t + image.sections[i].base_address),
-                                                                                 data[t],
-                                                                                 buffer[t]);
+                                                               "diff %d address " TARGET_ADDR_FMT ". Was 0x%02" PRIx8 " instead of 0x%02" PRIx8,
+                                                               diffs,
+                                                               t + image.sections[i].base_address,
+                                                               data[t],
+                                                               buffer[t]);
                                                        if (diffs++ >= 127) {
                                                                command_print(CMD, "More than 128 errors, the rest are not printed.");
                                                                free(data);

diff --git a/src/target/x86_32_common.c b/src/target/x86_32_common.c
index ecaf52b3ab624a3b339486ce90b8ec642ff1c6e4..666bb07bf9288fb15f2562c7e84f3919afd005f2 100644 (file)
--- a/src/target/x86_32_common.c
+++ b/src/target/x86_32_common.c
@@ -1360,8 +1360,8 @@ static void handle_iod_output(struct command_invocation *cmd,
                if (i % line_modulo == 0) {
                        output_len += snprintf(output + output_len,
                                        sizeof(output) - output_len,
-                                       "0x%8.8x: ",
-                                       (unsigned)(address + (i*size)));
+                                       "0x%8.8" PRIx32 ": ",
+                                       address + (i * size));
                }
 
                uint32_t value = 0;