x86/boot: Drop RIP_REL_REF() uses from SME startup code

RIP_REL_REF() has no effect on code residing in arch/x86/boot/startup,
as it is built with -fPIC. So remove any occurrences from the SME
startup code.

Note the SME is the only caller of cc_set_mask() that requires this, so
drop it from there as well.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Dionna Amalie Glaze <dionnaglaze@google.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Kevin Loughlin <kevinloughlin@google.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: linux-efi@vger.kernel.org
Link: https://lore.kernel.org/r/20250410134117.3713574-19-ardb+git@google.com

diff --git a/arch/x86/boot/startup/sme.c b/arch/x86/boot/startup/sme.c
index 23d10cda5b58c21c82a4ae512f0542d5b48b9aeb..5738b31c8e60c27a174b1e56865df3334dcd6f1e 100644 (file)
--- a/arch/x86/boot/startup/sme.c
+++ b/arch/x86/boot/startup/sme.c
@@ -297,8 +297,7 @@ void __head sme_encrypt_kernel(struct boot_params *bp)
         * instrumentation or checking boot_cpu_data in the cc_platform_has()
         * function.
         */
-       if (!sme_get_me_mask() ||
-           RIP_REL_REF(sev_status) & MSR_AMD64_SEV_ENABLED)
+       if (!sme_get_me_mask() || sev_status & MSR_AMD64_SEV_ENABLED)
                return;
 
        /*
@@ -524,7 +523,7 @@ void __head sme_enable(struct boot_params *bp)
        me_mask = 1UL << (ebx & 0x3f);
 
        /* Check the SEV MSR whether SEV or SME is enabled */
-       RIP_REL_REF(sev_status) = msr = __rdmsr(MSR_AMD64_SEV);
+       sev_status = msr = __rdmsr(MSR_AMD64_SEV);
        feature_mask = (msr & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT;
 
        /*
@@ -560,8 +559,8 @@ void __head sme_enable(struct boot_params *bp)
                        return;
        }
 
-       RIP_REL_REF(sme_me_mask) = me_mask;
-       RIP_REL_REF(physical_mask) &= ~me_mask;
-       RIP_REL_REF(cc_vendor) = CC_VENDOR_AMD;
+       sme_me_mask     = me_mask;
+       physical_mask   &= ~me_mask;
+       cc_vendor       = CC_VENDOR_AMD;
        cc_set_mask(me_mask);
 }

diff --git a/arch/x86/include/asm/coco.h b/arch/x86/include/asm/coco.h
index e7225452963f0a3494d600ff394ecf4dbf1f6f27..e1dbf8df1b695b4db2af78223c9810ded664ea5c 100644 (file)
--- a/arch/x86/include/asm/coco.h
+++ b/arch/x86/include/asm/coco.h
@@ -22,7 +22,7 @@ static inline u64 cc_get_mask(void)
 
 static inline void cc_set_mask(u64 mask)
 {
-       RIP_REL_REF(cc_mask) = mask;
+       cc_mask = mask;
 }
 
 u64 cc_mkenc(u64 val);

diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h
index 1530ee301dfeaf65e5090e5b821cdf08e193eb49..ea6494628cb0008e5ca0c349b02578d0d8b251bd 100644 (file)
--- a/arch/x86/include/asm/mem_encrypt.h
+++ b/arch/x86/include/asm/mem_encrypt.h
@@ -61,7 +61,7 @@ void __init sev_es_init_vc_handling(void);
 
 static inline u64 sme_get_me_mask(void)
 {
-       return RIP_REL_REF(sme_me_mask);
+       return sme_me_mask;
 }
 
 #define __bss_decrypted __section(".bss..decrypted")