/* CM-iTC */
 #define CLKCFG_UART_48MHZ                      (1 << 16)
+#define CLKCFG_UART_25MHZ                      (2 << 16)
 #define CLKCFG_BAUDDIV                         (2 << 20)
 #define CLKCFG_PLL2VCO                         (8 << 9)
 #define CLKCFG_UARTCLKSEL                      (1 << 18)
                iowrite32(0x25, chip->pch_phub_base_address + 0x44);
                chip->pch_opt_rom_start_address = PCH_PHUB_ROM_START_ADDR_EG20T;
                chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_EG20T;
+
+               /* quirk for MIPS Boston platform */
+               if (pdev->dev.of_node) {
+                       if (of_machine_is_compatible("img,boston")) {
+                               pch_phub_read_modify_write_reg(chip,
+                                       (unsigned int)CLKCFG_REG_OFFSET,
+                                       CLKCFG_UART_25MHZ,
+                                       CLKCFG_UART_MASK);
+                       }
+               }
        } else if (id->driver_data == 2) { /* ML7213 IOH */
                ret = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr);
                if (ret)