*/
 
 #include <linux/clk.h>
+#include <linux/clkdev.h>
+#include <linux/clk-provider.h>
 #include <linux/completion.h>
 #include <linux/err.h>
 #include <linux/i2c.h>
 struct bcm2835_i2c_dev {
        struct device *dev;
        void __iomem *regs;
-       struct clk *clk;
        int irq;
-       u32 bus_clk_rate;
        struct i2c_adapter adapter;
        struct completion completion;
        struct i2c_msg *curr_msg;
        return readl(i2c_dev->regs + reg);
 }
 
-static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev)
+#define to_clk_bcm2835_i2c(_hw) container_of(_hw, struct clk_bcm2835_i2c, hw)
+struct clk_bcm2835_i2c {
+       struct clk_hw hw;
+       struct bcm2835_i2c_dev *i2c_dev;
+};
+
+static int clk_bcm2835_i2c_calc_divider(unsigned long rate,
+                               unsigned long parent_rate)
 {
-       u32 divider, redl, fedl;
+       u32 divider = DIV_ROUND_UP(parent_rate, rate);
 
-       divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk),
-                              i2c_dev->bus_clk_rate);
        /*
         * Per the datasheet, the register is always interpreted as an even
         * number, by rounding down. In other words, the LSB is ignored. So,
        if (divider & 1)
                divider++;
        if ((divider < BCM2835_I2C_CDIV_MIN) ||
-           (divider > BCM2835_I2C_CDIV_MAX)) {
-               dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n");
+           (divider > BCM2835_I2C_CDIV_MAX))
                return -EINVAL;
-       }
 
-       bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
+       return divider;
+}
+
+static int clk_bcm2835_i2c_set_rate(struct clk_hw *hw, unsigned long rate,
+                               unsigned long parent_rate)
+{
+       struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw);
+       u32 redl, fedl;
+       u32 divider = clk_bcm2835_i2c_calc_divider(rate, parent_rate);
+
+       if (divider == -EINVAL)
+               return -EINVAL;
+
+       bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DIV, divider);
 
        /*
         * Number of core clocks to wait after falling edge before
         */
        redl = max(divider / 4, 1u);
 
-       bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DEL,
+       bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DEL,
                           (fedl << BCM2835_I2C_FEDL_SHIFT) |
                           (redl << BCM2835_I2C_REDL_SHIFT));
        return 0;
 }
 
+static long clk_bcm2835_i2c_round_rate(struct clk_hw *hw, unsigned long rate,
+                               unsigned long *parent_rate)
+{
+       u32 divider = clk_bcm2835_i2c_calc_divider(rate, *parent_rate);
+
+       return DIV_ROUND_UP(*parent_rate, divider);
+}
+
+static unsigned long clk_bcm2835_i2c_recalc_rate(struct clk_hw *hw,
+                                               unsigned long parent_rate)
+{
+       struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw);
+       u32 divider = bcm2835_i2c_readl(div->i2c_dev, BCM2835_I2C_DIV);
+
+       return DIV_ROUND_UP(parent_rate, divider);
+}
+
+static const struct clk_ops clk_bcm2835_i2c_ops = {
+       .set_rate = clk_bcm2835_i2c_set_rate,
+       .round_rate = clk_bcm2835_i2c_round_rate,
+       .recalc_rate = clk_bcm2835_i2c_recalc_rate,
+};
+
+static struct clk *bcm2835_i2c_register_div(struct device *dev,
+                                       const char *mclk_name,
+                                       struct bcm2835_i2c_dev *i2c_dev)
+{
+       struct clk_init_data init;
+       struct clk_bcm2835_i2c *priv;
+       char name[32];
+
+       snprintf(name, sizeof(name), "%s_div", dev_name(dev));
+
+       init.ops = &clk_bcm2835_i2c_ops;
+       init.name = name;
+       init.parent_names = (const char* []) { mclk_name };
+       init.num_parents = 1;
+       init.flags = 0;
+
+       priv = devm_kzalloc(dev, sizeof(struct clk_bcm2835_i2c), GFP_KERNEL);
+       if (priv == NULL)
+               return ERR_PTR(-ENOMEM);
+
+       priv->hw.init = &init;
+       priv->i2c_dev = i2c_dev;
+
+       clk_hw_register_clkdev(&priv->hw, "div", dev_name(dev));
+       return devm_clk_register(dev, &priv->hw);
+}
+
 static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
 {
        u32 val;
 {
        struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
        unsigned long time_left;
-       int i, ret;
+       int i;
 
        for (i = 0; i < (num - 1); i++)
                if (msgs[i].flags & I2C_M_RD) {
                        return -EOPNOTSUPP;
                }
 
-       ret = bcm2835_i2c_set_divider(i2c_dev);
-       if (ret)
-               return ret;
-
        i2c_dev->curr_msg = msgs;
        i2c_dev->num_msgs = num;
        reinit_completion(&i2c_dev->completion);
        struct resource *mem, *irq;
        int ret;
        struct i2c_adapter *adap;
+       const char *mclk_name;
+       struct clk *bus_clk;
+       u32 bus_clk_rate;
 
        i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
        if (!i2c_dev)
        if (IS_ERR(i2c_dev->regs))
                return PTR_ERR(i2c_dev->regs);
 
-       i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
-       if (IS_ERR(i2c_dev->clk)) {
-               if (PTR_ERR(i2c_dev->clk) != -EPROBE_DEFER)
-                       dev_err(&pdev->dev, "Could not get clock\n");
-               return PTR_ERR(i2c_dev->clk);
-       }
-
-       ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
-                                  &i2c_dev->bus_clk_rate);
-       if (ret < 0) {
-               dev_warn(&pdev->dev,
-                        "Could not read clock-frequency property\n");
-               i2c_dev->bus_clk_rate = 100000;
-       }
-
        irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
        if (!irq) {
                dev_err(&pdev->dev, "No IRQ resource\n");
                return -ENODEV;
        }
 
+       mclk_name = of_clk_get_parent_name(pdev->dev.of_node, 0);
+
+       bus_clk = bcm2835_i2c_register_div(&pdev->dev, mclk_name, i2c_dev);
+
+       if (IS_ERR(bus_clk)) {
+               dev_err(&pdev->dev, "Could not register clock\n");
+               return PTR_ERR(bus_clk);
+       }
+
+       ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
+                                  &bus_clk_rate);
+       if (ret < 0) {
+               dev_warn(&pdev->dev,
+                        "Could not read clock-frequency property\n");
+               bus_clk_rate = 100000;
+       }
+
+       ret = clk_set_rate_exclusive(bus_clk, bus_clk_rate);
+       if (ret < 0) {
+               dev_err(&pdev->dev, "Could not set clock frequency\n");
+               return ret;
+       }
+
+       ret = clk_prepare_enable(bus_clk);
+       if (ret) {
+               dev_err(&pdev->dev, "Couldn't prepare clock");
+               return ret;
+       }
+
        adap = &i2c_dev->adapter;
        i2c_set_adapdata(adap, i2c_dev);
        adap->owner = THIS_MODULE;
 static int bcm2835_i2c_remove(struct platform_device *pdev)
 {
        struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
+       struct clk *bus_clk = devm_clk_get(i2c_dev->dev, "div");
+
+       clk_rate_exclusive_put(bus_clk);
+       clk_disable_unprepare(bus_clk);
 
        free_irq(i2c_dev->irq, i2c_dev);
        i2c_del_adapter(&i2c_dev->adapter);