drm/amd/pm: increase mclk switch threshold to 200 us

commit 83da6eea3af669ee0b1f1bc05ffd6150af984994 upstream.

To avoid underflow seen on Polaris10 with some 3440x1440
144Hz displays. As the threshold of 190 us cuts too close
to minVBlankTime of 192 us.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 1b55f037ba4a7c43ca544fdf72041338454603fe..35e6cbe805eb4ff49c879920f0e32c4d3af38c43 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -2864,7 +2864,7 @@ static int smu7_vblank_too_short(struct pp_hwmgr *hwmgr,
                if (hwmgr->is_kicker)
                        switch_limit_us = data->is_memory_gddr5 ? 450 : 150;
                else
-                       switch_limit_us = data->is_memory_gddr5 ? 190 : 150;
+                       switch_limit_us = data->is_memory_gddr5 ? 200 : 150;
                break;
        case CHIP_VEGAM:
                switch_limit_us = 30;