]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
RISC-V: KVM: avoid EBUSY when writing same ISA val
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Thu, 3 Aug 2023 16:32:58 +0000 (13:32 -0300)
committerAnup Patel <anup@brainfault.org>
Tue, 8 Aug 2023 11:55:53 +0000 (17:25 +0530)
kvm_riscv_vcpu_set_reg_config() will return -EBUSY if the ISA config reg
is being written after the VCPU ran at least once.

The same restriction isn't placed in kvm_riscv_vcpu_get_reg_config(), so
there's a chance that we'll -EBUSY out on an ISA config reg write even
if the userspace intended no changes to it.

We'll allow the same form of 'lazy writing' that registers such as
zicbom/zicboz_block_size supports: avoid erroring out if userspace made
no changes to the ISA config reg.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/kvm/vcpu_onereg.c

index 971a2eb83180b6c4a89730bfd5549b2986de4d8d..a0b0364b038fea335f61c3b930b10fcdbb781859 100644 (file)
@@ -190,6 +190,13 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
                if (fls(reg_val) >= RISCV_ISA_EXT_BASE)
                        return -EINVAL;
 
+               /*
+                * Return early (i.e. do nothing) if reg_val is the same
+                * value retrievable via kvm_riscv_vcpu_get_reg_config().
+                */
+               if (reg_val == (vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK))
+                       break;
+
                if (!vcpu->arch.ran_atleast_once) {
                        /* Ignore the enable/disable request for certain extensions */
                        for (i = 0; i < RISCV_ISA_EXT_BASE; i++) {