static int i915_pipe_crc_open(struct inode *inode, struct file *filep)
 {
+       struct pipe_crc_info *info = inode->i_private;
+       struct drm_i915_private *dev_priv = info->dev->dev_private;
+       struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[info->pipe];
+
+       if (!atomic_dec_and_test(&pipe_crc->available)) {
+               atomic_inc(&pipe_crc->available);
+               return -EBUSY; /* already open */
+       }
+
        filep->private_data = inode->i_private;
 
        return 0;
 
 static int i915_pipe_crc_release(struct inode *inode, struct file *filep)
 {
+       struct pipe_crc_info *info = inode->i_private;
+       struct drm_i915_private *dev_priv = info->dev->dev_private;
+       struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[info->pipe];
+
+       atomic_inc(&pipe_crc->available); /* release the device */
+
        return 0;
 }
 
        for (i = 0; i < INTEL_INFO(dev)->num_pipes; i++) {
                struct intel_pipe_crc *pipe_crc = &dev_priv->pipe_crc[i];
 
+               atomic_set(&pipe_crc->available, 1);
                init_waitqueue_head(&pipe_crc->wq);
        }
 }
 
 
 #define INTEL_PIPE_CRC_ENTRIES_NR      128
 struct intel_pipe_crc {
+       atomic_t available;             /* exclusive access to the device */
        struct intel_pipe_crc_entry *entries;
        enum intel_pipe_crc_source source;
        atomic_t head, tail;