vc4_encoder->type == VC4_ENCODER_TYPE_DSI1);
        u32 format = is_dsi ? PV_CONTROL_FORMAT_DSIV_24 : PV_CONTROL_FORMAT_24;
        u8 ppc = pv_data->pixels_per_clock;
+       bool debug_dump_regs = false;
+
+       if (debug_dump_regs) {
+               struct drm_printer p = drm_info_printer(&vc4_crtc->pdev->dev);
+               dev_info(&vc4_crtc->pdev->dev, "CRTC %d regs before:\n",
+                        drm_crtc_index(crtc));
+               drm_print_regset32(&p, &vc4_crtc->regset);
+       }
 
        vc4_crtc_pixelvalve_reset(crtc);
 
                   PV_CONTROL_WAIT_HSTART |
                   VC4_SET_FIELD(vc4_encoder->clock_select,
                                 PV_CONTROL_CLK_SELECT));
-}
-
-static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
-{
-       struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
-       bool debug_dump_regs = false;
 
        if (debug_dump_regs) {
                struct drm_printer p = drm_info_printer(&vc4_crtc->pdev->dev);
-               dev_info(&vc4_crtc->pdev->dev, "CRTC %d regs before:\n",
+               dev_info(&vc4_crtc->pdev->dev, "CRTC %d regs after:\n",
                         drm_crtc_index(crtc));
                drm_print_regset32(&p, &vc4_crtc->regset);
        }
+}
 
+static void vc4_crtc_mode_set_nofb(struct drm_crtc *crtc)
+{
        vc4_crtc_config_pv(crtc);
 
        vc4_hvs_mode_set_nofb(crtc);
-
-       if (debug_dump_regs) {
-               struct drm_printer p = drm_info_printer(&vc4_crtc->pdev->dev);
-               dev_info(&vc4_crtc->pdev->dev, "CRTC %d regs after:\n",
-                        drm_crtc_index(crtc));
-               drm_print_regset32(&p, &vc4_crtc->regset);
-       }
 }
 
 static void require_hvs_enabled(struct drm_device *dev)