unsigned int irq_reg_stride;
 
+       unsigned int (*get_irq_reg)(struct regmap_irq_chip_data *data,
+                                   unsigned int base, int index);
+
        unsigned int clear_status:1;
 };
 
-static int sub_irq_reg(struct regmap_irq_chip_data *data,
-                      unsigned int base_reg, int i)
-{
-       const struct regmap_irq_chip *chip = data->chip;
-       struct regmap *map = data->map;
-       struct regmap_irq_sub_irq_map *subreg;
-       unsigned int offset;
-       int reg = 0;
-
-       if (!chip->sub_reg_offsets || !chip->not_fixed_stride) {
-               /* Assume linear mapping */
-               reg = base_reg + (i * map->reg_stride * data->irq_reg_stride);
-       } else {
-               subreg = &chip->sub_reg_offsets[i];
-               offset = subreg->offset[0];
-               reg = base_reg + offset;
-       }
-
-       return reg;
-}
-
 static inline const
 struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data,
                                     int irq)
 {
        struct regmap *map = data->map;
 
+       /*
+        * While possible that a user-defined ->get_irq_reg() callback might
+        * be linear enough to support bulk reads, most of the time it won't.
+        * Therefore only allow them if the default callback is being used.
+        */
        return data->irq_reg_stride == 1 && map->reg_stride == 1 &&
+              data->get_irq_reg == regmap_irq_get_irq_reg_linear &&
               !map->use_single_read;
 }
 
 
        if (d->clear_status) {
                for (i = 0; i < d->chip->num_regs; i++) {
-                       reg = sub_irq_reg(d, d->chip->status_base, i);
+                       reg = d->get_irq_reg(d, d->chip->status_base, i);
 
                        ret = regmap_read(map, reg, &val);
                        if (ret)
         */
        for (i = 0; i < d->chip->num_regs; i++) {
                if (d->mask_base) {
-                       reg = sub_irq_reg(d, d->mask_base, i);
+                       reg = d->get_irq_reg(d, d->mask_base, i);
                        ret = regmap_update_bits(d->map, reg,
                                        d->mask_buf_def[i], d->mask_buf[i]);
                        if (ret)
                }
 
                if (d->unmask_base) {
-                       reg = sub_irq_reg(d, d->unmask_base, i);
+                       reg = d->get_irq_reg(d, d->unmask_base, i);
                        ret = regmap_update_bits(d->map, reg,
                                        d->mask_buf_def[i], ~d->mask_buf[i]);
                        if (ret)
                                        reg);
                }
 
-               reg = sub_irq_reg(d, d->chip->wake_base, i);
+               reg = d->get_irq_reg(d, d->chip->wake_base, i);
                if (d->wake_buf) {
                        if (d->chip->wake_invert)
                                ret = regmap_update_bits(d->map, reg,
                 * it'll be ignored in irq handler, then may introduce irq storm
                 */
                if (d->mask_buf[i] && (d->chip->ack_base || d->chip->use_ack)) {
-                       reg = sub_irq_reg(d, d->chip->ack_base, i);
+                       reg = d->get_irq_reg(d, d->chip->ack_base, i);
 
                        /* some chips ack by write 0 */
                        if (d->chip->ack_invert)
                for (i = 0; i < d->chip->num_type_reg; i++) {
                        if (!d->type_buf_def[i])
                                continue;
-                       reg = sub_irq_reg(d, d->chip->type_base, i);
+                       reg = d->get_irq_reg(d, d->chip->type_base, i);
                        if (d->chip->type_invert)
                                ret = regmap_update_bits(d->map, reg,
                                        d->type_buf_def[i], ~d->type_buf[i]);
        if (d->chip->num_virt_regs) {
                for (i = 0; i < d->chip->num_virt_regs; i++) {
                        for (j = 0; j < d->chip->num_regs; j++) {
-                               reg = sub_irq_reg(d, d->chip->virt_reg_base[i],
-                                                 j);
+                               reg = d->get_irq_reg(d, d->chip->virt_reg_base[i],
+                                                    j);
                                ret = regmap_write(map, reg, d->virt_buf[i][j]);
                                if (ret != 0)
                                        dev_err(d->map->dev,
 
        for (i = 0; i < d->chip->num_config_bases; i++) {
                for (j = 0; j < d->chip->num_config_regs; j++) {
-                       reg = sub_irq_reg(d, d->chip->config_base[i], j);
+                       reg = d->get_irq_reg(d, d->chip->config_base[i], j);
                        ret = regmap_write(map, reg, d->config_buf[i][j]);
                        if (ret)
                                dev_err(d->map->dev,
        const struct regmap_irq_chip *chip = data->chip;
        struct regmap *map = data->map;
        struct regmap_irq_sub_irq_map *subreg;
+       unsigned int reg;
        int i, ret = 0;
 
        if (!chip->sub_reg_offsets) {
-               /* Assume linear mapping */
-               ret = regmap_read(map, chip->status_base +
-                                 (b * map->reg_stride * data->irq_reg_stride),
-                                  &data->status_buf[b]);
+               reg = data->get_irq_reg(data, chip->status_base, b);
+               ret = regmap_read(map, reg, &data->status_buf[b]);
        } else {
+               /*
+                * Note we can't use ->get_irq_reg() here because the offsets
+                * in 'subreg' are *not* interchangeable with indices.
+                */
                subreg = &chip->sub_reg_offsets[b];
                for (i = 0; i < subreg->num_regs; i++) {
                        unsigned int offset = subreg->offset[i];
                 * sake of simplicity. and add bulk reads only if needed
                 */
                for (i = 0; i < chip->num_main_regs; i++) {
-                       ret = regmap_read(map, chip->main_status +
-                                 (i * map->reg_stride
-                                  * data->irq_reg_stride),
-                                 &data->main_status_buf[i]);
+                       /*
+                        * For not_fixed_stride, don't use ->get_irq_reg().
+                        * It would produce an incorrect result.
+                        */
+                       if (data->chip->not_fixed_stride)
+                               reg = chip->main_status +
+                                       i * map->reg_stride * data->irq_reg_stride;
+                       else
+                               reg = data->get_irq_reg(data,
+                                                       chip->main_status, i);
+
+                       ret = regmap_read(map, reg, &data->main_status_buf[i]);
                        if (ret) {
                                dev_err(map->dev,
                                        "Failed to read IRQ status %d\n",
 
        } else {
                for (i = 0; i < data->chip->num_regs; i++) {
-                       unsigned int reg = sub_irq_reg(data,
+                       unsigned int reg = data->get_irq_reg(data,
                                        data->chip->status_base, i);
                        ret = regmap_read(map, reg, &data->status_buf[i]);
 
                data->status_buf[i] &= ~data->mask_buf[i];
 
                if (data->status_buf[i] && (chip->ack_base || chip->use_ack)) {
-                       reg = sub_irq_reg(data, data->chip->ack_base, i);
+                       reg = data->get_irq_reg(data, data->chip->ack_base, i);
 
                        if (chip->ack_invert)
                                ret = regmap_write(map, reg,
        .xlate  = irq_domain_xlate_onetwocell,
 };
 
+/**
+ * regmap_irq_get_irq_reg_linear() - Linear IRQ register mapping callback.
+ * @data: Data for the &struct regmap_irq_chip
+ * @base: Base register
+ * @index: Register index
+ *
+ * Returns the register address corresponding to the given @base and @index
+ * by the formula ``base + index * regmap_stride * irq_reg_stride``.
+ */
+unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data,
+                                          unsigned int base, int index)
+{
+       const struct regmap_irq_chip *chip = data->chip;
+       struct regmap *map = data->map;
+
+       /*
+        * FIXME: This is for backward compatibility and should be removed
+        * when not_fixed_stride is dropped (it's only used by qcom-pm8008).
+        */
+       if (chip->not_fixed_stride && chip->sub_reg_offsets) {
+               struct regmap_irq_sub_irq_map *subreg;
+
+               subreg = &chip->sub_reg_offsets[0];
+               return base + subreg->offset[0];
+       }
+
+       return base + index * map->reg_stride * chip->irq_reg_stride;
+}
+EXPORT_SYMBOL_GPL(regmap_irq_get_irq_reg_linear);
+
 /**
  * regmap_irq_set_type_config_simple() - Simple IRQ type configuration callback.
  * @buf: Buffer containing configuration register values, this is a 2D array of
        else
                d->irq_reg_stride = 1;
 
+       if (chip->get_irq_reg)
+               d->get_irq_reg = chip->get_irq_reg;
+       else
+               d->get_irq_reg = regmap_irq_get_irq_reg_linear;
+
        if (regmap_irq_can_bulk_read_status(d)) {
                d->status_reg_buf = kmalloc_array(chip->num_regs,
                                                  map->format.val_bytes,
                d->mask_buf[i] = d->mask_buf_def[i];
 
                if (d->mask_base) {
-                       reg = sub_irq_reg(d, d->mask_base, i);
+                       reg = d->get_irq_reg(d, d->mask_base, i);
                        ret = regmap_update_bits(d->map, reg,
                                        d->mask_buf_def[i], d->mask_buf[i]);
                        if (ret) {
                }
 
                if (d->unmask_base) {
-                       reg = sub_irq_reg(d, d->unmask_base, i);
+                       reg = d->get_irq_reg(d, d->unmask_base, i);
                        ret = regmap_update_bits(d->map, reg,
                                        d->mask_buf_def[i], ~d->mask_buf[i]);
                        if (ret) {
                        continue;
 
                /* Ack masked but set interrupts */
-               reg = sub_irq_reg(d, d->chip->status_base, i);
+               reg = d->get_irq_reg(d, d->chip->status_base, i);
                ret = regmap_read(map, reg, &d->status_buf[i]);
                if (ret != 0) {
                        dev_err(map->dev, "Failed to read IRQ status: %d\n",
                        d->status_buf[i] = ~d->status_buf[i];
 
                if (d->status_buf[i] && (chip->ack_base || chip->use_ack)) {
-                       reg = sub_irq_reg(d, d->chip->ack_base, i);
+                       reg = d->get_irq_reg(d, d->chip->ack_base, i);
                        if (chip->ack_invert)
                                ret = regmap_write(map, reg,
                                        ~(d->status_buf[i] & d->mask_buf[i]));
        if (d->wake_buf) {
                for (i = 0; i < chip->num_regs; i++) {
                        d->wake_buf[i] = d->mask_buf_def[i];
-                       reg = sub_irq_reg(d, d->chip->wake_base, i);
+                       reg = d->get_irq_reg(d, d->chip->wake_base, i);
 
                        if (chip->wake_invert)
                                ret = regmap_update_bits(d->map, reg,
 
        if (chip->num_type_reg && !chip->type_in_mask) {
                for (i = 0; i < chip->num_type_reg; ++i) {
-                       reg = sub_irq_reg(d, d->chip->type_base, i);
+                       reg = d->get_irq_reg(d, d->chip->type_base, i);
 
                        ret = regmap_read(map, reg, &d->type_buf_def[i]);