octeontx2-af: cn10k: mcs: Install a default TCAM for normal traffic

Out of all the TCAM entries, reserve last TX and RX TCAM flow
entry(low priority) so that normal traffic can be sent out and
received. The traffic which needs macsec processing hits the
high priority TCAM flows. Also install a FLR handler to free
the allocated resources for PF/VF.

Signed-off-by: Geetha sowjanya <gakula@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: Subbaraya Sundeep <sbhatta@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c
index 2f48fb98572e27d9d5ee8d6a94f532f21e033f14..5c8a5bc6711fd1766dee2d3bda2206a68f0feb1d 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mcs.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs.c
@@ -181,6 +181,51 @@ void mcs_flowid_entry_write(struct mcs *mcs, u64 *data, u64 *mask, int flow_id,
        }
 }
 
+int mcs_install_flowid_bypass_entry(struct mcs *mcs)
+{
+       int flow_id, secy_id, reg_id;
+       struct secy_mem_map map;
+       u64 reg, plcy = 0;
+
+       /* Flow entry */
+       flow_id = mcs->hw->tcam_entries - MCS_RSRC_RSVD_CNT;
+       for (reg_id = 0; reg_id < 4; reg_id++) {
+               reg = MCSX_CPM_RX_SLAVE_FLOWID_TCAM_MASKX(reg_id, flow_id);
+               mcs_reg_write(mcs, reg, GENMASK_ULL(63, 0));
+       }
+       for (reg_id = 0; reg_id < 4; reg_id++) {
+               reg = MCSX_CPM_TX_SLAVE_FLOWID_TCAM_MASKX(reg_id, flow_id);
+               mcs_reg_write(mcs, reg, GENMASK_ULL(63, 0));
+       }
+       /* secy */
+       secy_id = mcs->hw->secy_entries - MCS_RSRC_RSVD_CNT;
+
+       /* Set validate frames to NULL and enable control port */
+       plcy = 0x7ull;
+       if (mcs->hw->mcs_blks > 1)
+               plcy = BIT_ULL(0) | 0x3ull << 4;
+       mcs_secy_plcy_write(mcs, plcy, secy_id, MCS_RX);
+
+       /* Enable control port and set mtu to max */
+       plcy = BIT_ULL(0) | GENMASK_ULL(43, 28);
+       if (mcs->hw->mcs_blks > 1)
+               plcy = BIT_ULL(0) | GENMASK_ULL(63, 48);
+       mcs_secy_plcy_write(mcs, plcy, secy_id, MCS_TX);
+
+       /* Map flowid to secy */
+       map.secy = secy_id;
+       map.ctrl_pkt = 0;
+       map.flow_id = flow_id;
+       mcs->mcs_ops->mcs_flowid_secy_map(mcs, &map, MCS_RX);
+       map.sc = secy_id;
+       mcs->mcs_ops->mcs_flowid_secy_map(mcs, &map, MCS_TX);
+
+       /* Enable Flowid entry */
+       mcs_ena_dis_flowid_entry(mcs, flow_id, MCS_RX, true);
+       mcs_ena_dis_flowid_entry(mcs, flow_id, MCS_TX, true);
+       return 0;
+}
+
 void mcs_clear_secy_plcy(struct mcs *mcs, int secy_id, int dir)
 {
        struct mcs_rsrc_map *map;

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c b/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
index 3c307e7071216ead18fecb3e8cb613c6477e842d..8a7d4556c28f24acbec0953ca866e97a9e327a92 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mcs_rvu_if.c
@@ -133,6 +133,27 @@ int rvu_mbox_handler_mcs_custom_tag_cfg_get(struct rvu *rvu, struct mcs_custom_t
        return 0;
 }
 
+int rvu_mcs_flr_handler(struct rvu *rvu, u16 pcifunc)
+{
+       struct mcs *mcs;
+       int mcs_id;
+
+       /* CNF10K-B mcs0-6 are mapped to RPM2-8*/
+       if (rvu->mcs_blk_cnt > 1) {
+               for (mcs_id = 0; mcs_id < rvu->mcs_blk_cnt; mcs_id++) {
+                       mcs = mcs_get_pdata(mcs_id);
+                       mcs_free_all_rsrc(mcs, MCS_RX, pcifunc);
+                       mcs_free_all_rsrc(mcs, MCS_TX, pcifunc);
+               }
+       } else {
+               /* CN10K-B has only one mcs block */
+               mcs = mcs_get_pdata(0);
+               mcs_free_all_rsrc(mcs, MCS_RX, pcifunc);
+               mcs_free_all_rsrc(mcs, MCS_TX, pcifunc);
+       }
+       return 0;
+}
+
 int rvu_mbox_handler_mcs_flowid_ena_entry(struct rvu *rvu,
                                          struct mcs_flowid_ena_dis_entry *req,
                                          struct msg_rsp *rsp)
@@ -543,8 +564,10 @@ int rvu_mcs_init(struct rvu *rvu)
                rvu_mcs_set_lmac_bmap(rvu);
        }
 
+       /* Install default tcam bypass entry and set port to operational mode */
        for (mcs_id = 0; mcs_id < rvu->mcs_blk_cnt; mcs_id++) {
                mcs = mcs_get_pdata(mcs_id);
+               mcs_install_flowid_bypass_entry(mcs);
                for (lmac = 0; lmac < mcs->hw->lmac_cnt; lmac++)
                        mcs_set_lmac_mode(mcs, lmac, 0);
        }

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 9a150dacb01215729b4f93ec9d2013507eb33948..4aefe47134d03d8a3d23eff77c550fef70279884 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -875,5 +875,6 @@ int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,
 
 /* CN10K MCS */
 int rvu_mcs_init(struct rvu *rvu);
+int rvu_mcs_flr_handler(struct rvu *rvu, u16 pcifunc);
 
 #endif /* RVU_H */