{
        uint32_t reg;
 
-       if (!vega10_is_smc_ram_running(hwmgr))
-               return -EINVAL;
-
        reg = soc15_get_register_offset(MP1_HWID, 0,
                        mmMP1_SMN_C2PMSG_90_BASE_IDX, mmMP1_SMN_C2PMSG_90);
 
 {
        uint32_t reg;
 
-       if (!vega10_is_smc_ram_running(hwmgr))
-               return -EINVAL;
-
        reg = soc15_get_register_offset(MP1_HWID, 0,
                        mmMP1_SMN_C2PMSG_66_BASE_IDX, mmMP1_SMN_C2PMSG_66);
        cgs_write_register(hwmgr->device, reg, msg);
 {
        uint32_t reg;
 
-       if (!vega10_is_smc_ram_running(hwmgr))
-               return -EINVAL;
-
        vega10_wait_for_response(hwmgr);
 
        reg = soc15_get_register_offset(MP1_HWID, 0,
 {
        uint32_t reg;
 
-       if (!vega10_is_smc_ram_running(hwmgr))
-               return -EINVAL;
-
        vega10_wait_for_response(hwmgr);
 
        reg = soc15_get_register_offset(MP1_HWID, 0,
 
 static int vega10_start_smu(struct pp_hwmgr *hwmgr)
 {
+       if (!vega10_is_smc_ram_running(hwmgr))
+               return -EINVAL;
+
        PP_ASSERT_WITH_CODE(!vega10_verify_smc_interface(hwmgr),
                        "Failed to verify SMC interface!",
                        return -EINVAL);