Reference the PHY nodes from the USB controller nodes.
The USB3 host controller is wired to:
  * the first PHY of the COMPHY IP
  * the OTG-capable UTMI PHY
The USB2 host controller is wired to:
  * the host-only UTMI PHY
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
                                marvell,usb-misc-reg = <&usb32_syscon>;
                                interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&sb_periph_clk 12>;
+                               phys = <&comphy0 0>, <&usb2_utmi_otg_phy>;
+                               phy-names = "usb3-phy", "usb2-utmi-otg-phy";
                                status = "disabled";
                        };
 
                                reg = <0x5e000 0x1000>;
                                marvell,usb-misc-reg = <&usb2_syscon>;
                                interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+                               phys = <&usb2_utmi_host_phy>;
+                               phy-names = "usb2-utmi-host-phy";
                                status = "disabled";
                        };