u8         reserved_at_118[0x3];
        u8         log_wq_sz[0x5];
 
-       u8         reserved_at_120[0x3];
+       u8         dbr_umem_valid[0x1];
+       u8         wq_umem_valid[0x1];
+       u8         reserved_at_122[0x1];
        u8         log_hairpin_num_packets[0x5];
        u8         reserved_at_128[0x3];
        u8         log_hairpin_data_sz[0x5];
 
        u8         dc_access_key[0x40];
 
-       u8         reserved_at_680[0xc0];
+       u8         reserved_at_680[0x3];
+       u8         dbr_umem_valid[0x1];
+
+       u8         reserved_at_684[0xbc];
 };
 
 struct mlx5_ifc_roce_addr_layout_bits {
 
        u8         wq_signature[0x1];
        u8         cont_srq[0x1];
-       u8         reserved_at_22[0x1];
+       u8         dbr_umem_valid[0x1];
        u8         rlky[0x1];
        u8         basic_cyclic_rcv_wqe[0x1];
        u8         log_rq_stride[0x3];
 
 struct mlx5_ifc_cqc_bits {
        u8         status[0x4];
-       u8         reserved_at_4[0x4];
+       u8         reserved_at_4[0x2];
+       u8         dbr_umem_valid[0x1];
+       u8         reserved_at_7[0x1];
        u8         cqe_sz[0x3];
        u8         cc[0x1];
        u8         reserved_at_c[0x1];
 
 struct mlx5_ifc_modify_tis_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_modify_tir_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_modify_rqt_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
        struct mlx5_ifc_cqc_bits cq_context;
 
-       u8         reserved_at_280[0x600];
+       u8         reserved_at_280[0x40];
+
+       u8         cq_umem_valid[0x1];
+       u8         reserved_at_2c1[0x5bf];
 
        u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_detach_from_mcg_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_destroy_tis_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_destroy_tir_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_destroy_rqt_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_dealloc_xrcd_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_dealloc_pd_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
        struct mlx5_ifc_xrc_srqc_bits xrc_srq_context_entry;
 
-       u8         reserved_at_280[0x600];
+       u8         reserved_at_280[0x40];
+       u8         xrc_srq_umem_valid[0x1];
+       u8         reserved_at_2c1[0x5bf];
 
        u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_create_tis_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_create_tir_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_create_rqt_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
        struct mlx5_ifc_qpc_bits qpc;
 
-       u8         reserved_at_800[0x80];
+       u8         reserved_at_800[0x60];
+
+       u8         wq_umem_valid[0x1];
+       u8         reserved_at_861[0x1f];
 
        u8         pas[0][0x40];
 };
        u8         reserved_at_40[0x20];
 
        u8         pg_access[0x1];
-       u8         reserved_at_61[0x1f];
+       u8         mkey_umem_valid[0x1];
+       u8         reserved_at_62[0x1e];
 
        struct mlx5_ifc_mkc_bits memory_key_mkey_entry;
 
 
        struct mlx5_ifc_cqc_bits cq_context;
 
-       u8         reserved_at_280[0x600];
+       u8         reserved_at_280[0x60];
+
+       u8         cq_umem_valid[0x1];
+       u8         reserved_at_2e1[0x59f];
 
        u8         pas[0][0x40];
 };
 
 struct mlx5_ifc_attach_to_mcg_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_alloc_xrcd_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];
 
 struct mlx5_ifc_alloc_pd_in_bits {
        u8         opcode[0x10];
-       u8         reserved_at_10[0x10];
+       u8         uid[0x10];
 
        u8         reserved_at_20[0x10];
        u8         op_mod[0x10];