ARM: dts: aspeed: minerva: Add spi-gpio

Add spi-gpio for TPM device.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-18-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts
index 8180fa5c185442d508949f2c93dbc7204bb20ab6..f5ac248097b4d163ba9472a033f028380ef18ca0 100644 (file)
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-minerva.dts
@@ -23,6 +23,8 @@
                i2c19 = &imux19;
                i2c20 = &imux20;
                i2c21 = &imux21;
+
+               spi1 = &spi_gpio;
        };
 
        chosen {
@@ -74,6 +76,25 @@
                        default-state = "off";
                };
        };
+
+       spi_gpio: spi {
+               status = "okay";
+               compatible = "spi-gpio";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
+               mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
+               miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
+               num-chipselects = <1>;
+               cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
+
+               tpm@0 {
+                       compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+                       spi-max-frequency = <33000000>;
+                       reg = <0>;
+               };
+       };
 };
 
 &uart6 {