u32 ctrl1 = readl(priv->base + CRT_CTRL1);
        u32 ctrl2 = readl(priv->base + CRT_CTRL2);
 
-       /* SCU2C: set DAC source for display output to Graphics CRT (GFX) */
-       regmap_update_bits(priv->scu, 0x2c, BIT(16), BIT(16));
+       /* Set DAC source for display output to Graphics CRT (GFX) */
+       regmap_update_bits(priv->scu, priv->dac_reg, BIT(16), BIT(16));
 
        writel(ctrl1 | CRT_CTRL_EN, priv->base + CRT_CTRL1);
        writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
        writel(ctrl1 & ~CRT_CTRL_EN, priv->base + CRT_CTRL1);
        writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
 
-       regmap_update_bits(priv->scu, 0x2c, BIT(16), 0);
+       regmap_update_bits(priv->scu, priv->dac_reg, BIT(16), 0);
 }
 
 static void aspeed_gfx_crtc_mode_set_nofb(struct aspeed_gfx *priv)
         * Terminal Count: memory size of one scan line
         */
        d_offset = m->hdisplay * bpp / 8;
-       t_count = (m->hdisplay * bpp + 127) / 128;
+       t_count = DIV_ROUND_UP(m->hdisplay * bpp, priv->scan_line_max);
+
        writel(CRT_DISP_OFFSET(d_offset) | CRT_TERM_COUNT(t_count),
                        priv->base + CRT_OFFSET);
 
         * Threshold: FIFO thresholds of refill and stop (16 byte chunks
         * per line, rounded up)
         */
-       writel(G5_CRT_THROD_VAL, priv->base + CRT_THROD);
+       writel(priv->throd_val, priv->base + CRT_THROD);
 }
 
 static void aspeed_gfx_pipe_enable(struct drm_simple_display_pipe *pipe,
 
 #include <linux/mfd/syscon.h>
 #include <linux/module.h>
 #include <linux/of.h>
+#include <linux/of_device.h>
 #include <linux/of_reserved_mem.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
  * which is available under NDA from ASPEED.
  */
 
+struct aspeed_gfx_config {
+       u32 dac_reg;            /* DAC register in SCU */
+       u32 vga_scratch_reg;    /* VGA scratch register in SCU */
+       u32 throd_val;          /* Default Threshold Seting */
+       u32 scan_line_max;      /* Max memory size of one scan line */
+};
+
+static const struct aspeed_gfx_config ast2400_config = {
+       .dac_reg = 0x2c,
+       .vga_scratch_reg = 0x50,
+       .throd_val = CRT_THROD_LOW(0x1e) | CRT_THROD_HIGH(0x12),
+       .scan_line_max = 64,
+};
+
+static const struct aspeed_gfx_config ast2500_config = {
+       .dac_reg = 0x2c,
+       .vga_scratch_reg = 0x50,
+       .throd_val = CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3c),
+       .scan_line_max = 128,
+};
+
+static const struct of_device_id aspeed_gfx_match[] = {
+       { .compatible = "aspeed,ast2400-gfx", .data = &ast2400_config },
+       { .compatible = "aspeed,ast2500-gfx", .data = &ast2500_config },
+       { },
+};
+MODULE_DEVICE_TABLE(of, aspeed_gfx_match);
+
 static const struct drm_mode_config_funcs aspeed_gfx_mode_config_funcs = {
        .fb_create              = drm_gem_fb_create,
        .atomic_check           = drm_atomic_helper_check,
        return IRQ_NONE;
 }
 
-
-
 static int aspeed_gfx_load(struct drm_device *drm)
 {
        struct platform_device *pdev = to_platform_device(drm->dev);
        struct aspeed_gfx *priv = to_aspeed_gfx(drm);
        struct device_node *np = pdev->dev.of_node;
+       const struct aspeed_gfx_config *config;
+       const struct of_device_id *match;
        struct resource *res;
        int ret;
 
        if (IS_ERR(priv->base))
                return PTR_ERR(priv->base);
 
+       match = of_match_device(aspeed_gfx_match, &pdev->dev);
+       if (!match)
+               return -EINVAL;
+       config = match->data;
+
+       priv->dac_reg = config->dac_reg;
+       priv->vga_scratch_reg = config->vga_scratch_reg;
+       priv->throd_val = config->throd_val;
+       priv->scan_line_max = config->scan_line_max;
+
        priv->scu = syscon_regmap_lookup_by_phandle(np, "syscon");
        if (IS_ERR(priv->scu)) {
                priv->scu = syscon_regmap_lookup_by_compatible("aspeed,ast2500-scu");
        .minor = 0,
 };
 
-static const struct of_device_id aspeed_gfx_match[] = {
-       { .compatible = "aspeed,ast2500-gfx" },
-       { }
-};
-
-#define ASPEED_SCU_VGA0                0x50
-#define ASPEED_SCU_MISC_CTRL   0x2c
-
 static ssize_t dac_mux_store(struct device *dev, struct device_attribute *attr,
                             const char *buf, size_t count)
 {
        if (val > 3)
                return -EINVAL;
 
-       rc = regmap_update_bits(priv->scu, ASPEED_SCU_MISC_CTRL, 0x30000, val << 16);
+       rc = regmap_update_bits(priv->scu, priv->dac_reg, 0x30000, val << 16);
        if (rc < 0)
                return 0;
 
        u32 reg;
        int rc;
 
-       rc = regmap_read(priv->scu, ASPEED_SCU_MISC_CTRL, ®);
+       rc = regmap_read(priv->scu, priv->dac_reg, ®);
        if (rc)
                return rc;
 
        u32 reg;
        int rc;
 
-       rc = regmap_read(priv->scu, ASPEED_SCU_VGA0, ®);
+       rc = regmap_read(priv->scu, priv->vga_scratch_reg, ®);
        if (rc)
                return rc;