powerpc: Fix workaround for spurious MCE on POWER9

In the recent commit d8bd9f3f0925 ("powerpc: Handle MCE on POWER9 with
only DSISR bit 30 set") I screwed up the bit number. It should be bit
25 (IBM bit 38).

Fixes: d8bd9f3f0925 ("powerpc: Handle MCE on POWER9 with only DSISR bit 30 set")
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_power.c
index f523125b9d34338991c01999d091386230962597..72f153c6f3facea2bda06b64e90b24a6fed253d5 100644 (file)
--- a/arch/powerpc/kernel/mce_power.c
+++ b/arch/powerpc/kernel/mce_power.c
@@ -626,7 +626,7 @@ long __machine_check_early_realmode_p9(struct pt_regs *regs)
 {
        /*
         * On POWER9 DD2.1 and below, it's possible to get a machine check
-        * caused by a paste instruction where only DSISR bit 30 is set. This
+        * caused by a paste instruction where only DSISR bit 25 is set. This
         * will result in the MCE handler seeing an unknown event and the kernel
         * crashing. An MCE that occurs like this is spurious, so we don't need
         * to do anything in terms of servicing it. If there is something that
@@ -634,7 +634,7 @@ long __machine_check_early_realmode_p9(struct pt_regs *regs)
         * correct DSISR so that it can be serviced properly. So detect this
         * case and mark it as handled.
         */
-       if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x40000000)
+       if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x02000000)
                return 1;
 
        return mce_handle_error(regs, mce_p9_derror_table, mce_p9_ierror_table);