scsi: ufs: ufs-qcom: Refactor MCQ register dump logic

Refactor MCQ register dump to align with the new resource mapping.  As
part of refactor, below changes are done:

 - Update ufs_qcom_dump_regs() function signature to accept direct
   base address instead of resource ID enum

 - Modify ufs_qcom_dump_mcq_hci_regs() to use hba->mcq_base and
   calculated addresses from MCQ operation info

 - Replace enum ufshcd_res with direct memory-mapped I/O addresses

Additionally remove the ufshcd_res_info structure and associated enum
ufshcd_res definitions from the UFS host controller header.  These were
previously used for MCQ resource mapping but are no longer needed
following recent refactoring to use direct base addresses instead of
multiple separate resource regions.

Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
Reviewed-by: Bart Van Assche <bvanassche@acm.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index 382d9e0f25a5ec11f37423f1ecd52433e5d1a00b..fee0bb6fd23c99c446fb085dc5f4e602f84f142c 100644 (file)
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -1742,7 +1742,7 @@ static void ufs_qcom_dump_testbus(struct ufs_hba *hba)
 }
 
 static int ufs_qcom_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
-                             const char *prefix, enum ufshcd_res id)
+                             const char *prefix, void __iomem *base)
 {
        u32 *regs __free(kfree) = NULL;
        size_t pos;
@@ -1755,7 +1755,7 @@ static int ufs_qcom_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
                return -ENOMEM;
 
        for (pos = 0; pos < len; pos += 4)
-               regs[pos / 4] = readl(hba->res[id].base + offset + pos);
+               regs[pos / 4] = readl(base + offset + pos);
 
        print_hex_dump(KERN_ERR, prefix,
                       len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,
@@ -1766,30 +1766,34 @@ static int ufs_qcom_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
 
 static void ufs_qcom_dump_mcq_hci_regs(struct ufs_hba *hba)
 {
+       struct ufshcd_mcq_opr_info_t *opr = &hba->mcq_opr[0];
+       void __iomem *mcq_vs_base = hba->mcq_base + UFS_MEM_VS_BASE;
+
        struct dump_info {
+               void __iomem *base;
                size_t offset;
                size_t len;
                const char *prefix;
-               enum ufshcd_res id;
        };
 
        struct dump_info mcq_dumps[] = {
-               {0x0, 256 * 4, "MCQ HCI-0 ", RES_MCQ},
-               {0x400, 256 * 4, "MCQ HCI-1 ", RES_MCQ},
-               {0x0, 5 * 4, "MCQ VS-0 ", RES_MCQ_VS},
-               {0x0, 256 * 4, "MCQ SQD-0 ", RES_MCQ_SQD},
-               {0x400, 256 * 4, "MCQ SQD-1 ", RES_MCQ_SQD},
-               {0x800, 256 * 4, "MCQ SQD-2 ", RES_MCQ_SQD},
-               {0xc00, 256 * 4, "MCQ SQD-3 ", RES_MCQ_SQD},
-               {0x1000, 256 * 4, "MCQ SQD-4 ", RES_MCQ_SQD},
-               {0x1400, 256 * 4, "MCQ SQD-5 ", RES_MCQ_SQD},
-               {0x1800, 256 * 4, "MCQ SQD-6 ", RES_MCQ_SQD},
-               {0x1c00, 256 * 4, "MCQ SQD-7 ", RES_MCQ_SQD},
+               {hba->mcq_base, 0x0, 256 * 4, "MCQ HCI-0 "},
+               {hba->mcq_base, 0x400, 256 * 4, "MCQ HCI-1 "},
+               {mcq_vs_base, 0x0, 5 * 4, "MCQ VS-0 "},
+               {opr->base, 0x0, 256 * 4, "MCQ SQD-0 "},
+               {opr->base, 0x400, 256 * 4, "MCQ SQD-1 "},
+               {opr->base, 0x800, 256 * 4, "MCQ SQD-2 "},
+               {opr->base, 0xc00, 256 * 4, "MCQ SQD-3 "},
+               {opr->base, 0x1000, 256 * 4, "MCQ SQD-4 "},
+               {opr->base, 0x1400, 256 * 4, "MCQ SQD-5 "},
+               {opr->base, 0x1800, 256 * 4, "MCQ SQD-6 "},
+               {opr->base, 0x1c00, 256 * 4, "MCQ SQD-7 "},
+
        };
 
        for (int i = 0; i < ARRAY_SIZE(mcq_dumps); i++) {
                ufs_qcom_dump_regs(hba, mcq_dumps[i].offset, mcq_dumps[i].len,
-                                  mcq_dumps[i].prefix, mcq_dumps[i].id);
+                                  mcq_dumps[i].prefix, mcq_dumps[i].base);
                cond_resched();
        }
 }

diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 1d3943777584240377c5f4da8964bba41461ac79..a7bcf7c7a1af7b70ec8f67dcb19b5e50a410419f 100644 (file)
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -794,30 +794,6 @@ struct ufs_hba_monitor {
        bool enabled;
 };
 
-/**
- * struct ufshcd_res_info_t - MCQ related resource regions
- *
- * @name: resource name
- * @resource: pointer to resource region
- * @base: register base address
- */
-struct ufshcd_res_info {
-       const char *name;
-       struct resource *resource;
-       void __iomem *base;
-};
-
-enum ufshcd_res {
-       RES_UFS,
-       RES_MCQ,
-       RES_MCQ_SQD,
-       RES_MCQ_SQIS,
-       RES_MCQ_CQD,
-       RES_MCQ_CQIS,
-       RES_MCQ_VS,
-       RES_MAX,
-};
-
 /**
  * struct ufshcd_mcq_opr_info_t - Operation and Runtime registers
  *
@@ -1127,7 +1103,6 @@ struct ufs_hba {
        bool lsdb_sup;
        bool mcq_enabled;
        bool mcq_esi_enabled;
-       struct ufshcd_res_info res[RES_MAX];
        void __iomem *mcq_base;
        struct ufs_hw_queue *uhq;
        struct ufs_hw_queue *dev_cmd_queue;