bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
 
        /*
-        * Verify it is a UART type device
+        * Verify it is a 16550-UART type device
         */
        if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) &&
             (classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) ||
-          (((classcode >> 8) & 0xff) != 0x02)) /* 16550 I/F at BAR0 */ {
+           (((classcode >> 8) & 0xff) != PCI_SERIAL_16550_COMPATIBLE)) {
                if (!force)
                        return;
        }
        /*
         * Determine if it is IO or memory mapped
         */
-       if (bar0 & 0x01) {
+       if ((bar0 & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
                /* it is IO mapped */
                serial_in = io_serial_in;
                serial_out = io_serial_out;
-               early_serial_base = bar0&0xfffffffc;
+               early_serial_base = bar0 & PCI_BASE_ADDRESS_IO_MASK;
                write_pci_config(bus, slot, func, PCI_COMMAND,
-                                               cmdreg|PCI_COMMAND_IO);
+                                cmdreg|PCI_COMMAND_IO);
        } else {
                /* It is memory mapped - assume 32-bit alignment */
                serial_in = mem32_serial_in;
                serial_out = mem32_serial_out;
                /* WARNING! assuming the address is always in the first 4G */
                early_serial_base =
-                       (unsigned long)early_ioremap(bar0 & 0xfffffff0, 0x10);
+                       (unsigned long)early_ioremap(bar0 & PCI_BASE_ADDRESS_MEM_MASK, 0x10);
                write_pci_config(bus, slot, func, PCI_COMMAND,
-                                               cmdreg|PCI_COMMAND_MEMORY);
+                                cmdreg|PCI_COMMAND_MEMORY);
        }
 
        /*
 
 #define PCI_CLASS_COMMUNICATION_MODEM  0x0703
 #define PCI_CLASS_COMMUNICATION_OTHER  0x0780
 
+/* Interface for SERIAL/MODEM */
+#define PCI_SERIAL_16550_COMPATIBLE    0x02
+
 #define PCI_BASE_CLASS_SYSTEM          0x08
 #define PCI_CLASS_SYSTEM_PIC           0x0800
 #define PCI_CLASS_SYSTEM_PIC_IOAPIC    0x080010