drm/i915/bmg: Load DMC

Load Battlemage's DMC. We re-use XELPDP_DMC_MAX_FW_SIZE since BMG's
display is a derivative of Xe_LPD+ and has the same MMIO offset limits.

Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240510140532.112352-2-gustavo.sousa@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index cbd2ac5671b1f9587dcf2c7677115e0e611a69e4..63fccdda56c0e849e5a2b8036c11f8ec4dcb21da 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -115,6 +115,9 @@ static bool dmc_firmware_param_disabled(struct drm_i915_private *i915)
 #define XE2LPD_DMC_PATH                        DMC_PATH(xe2lpd)
 MODULE_FIRMWARE(XE2LPD_DMC_PATH);
 
+#define BMG_DMC_PATH                   DMC_PATH(bmg)
+MODULE_FIRMWARE(BMG_DMC_PATH);
+
 #define MTL_DMC_PATH                   DMC_PATH(mtl)
 MODULE_FIRMWARE(MTL_DMC_PATH);
 
@@ -166,6 +169,9 @@ static const char *dmc_firmware_default(struct drm_i915_private *i915, u32 *size
        if (DISPLAY_VER_FULL(i915) == IP_VER(20, 0)) {
                fw_path = XE2LPD_DMC_PATH;
                max_fw_size = XE2LPD_DMC_MAX_FW_SIZE;
+       } else if (DISPLAY_VER_FULL(i915) == IP_VER(14, 1)) {
+               fw_path = BMG_DMC_PATH;
+               max_fw_size = XELPDP_DMC_MAX_FW_SIZE;
        } else if (DISPLAY_VER_FULL(i915) == IP_VER(14, 0)) {
                fw_path = MTL_DMC_PATH;
                max_fw_size = XELPDP_DMC_MAX_FW_SIZE;