drm/i915/icl: DP_AUX_E is valid on ICL+

Add support for DP_AUX_E. Here we also introduce the bits for the AUX
power well E, however ICL power well support is still not enabled yet,
so the power well is not used.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: James Ausmus <james.ausmus@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180612002512.29783-2-paulo.r.zanoni@intel.com

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6104d7115054692d4a6ed727e6632bd11b9e4813..be8c2f0823c46f7b3aed82b8891eb3df833c5a7e 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1016,6 +1016,7 @@ enum modeset_restore {
 #define DP_AUX_B 0x10
 #define DP_AUX_C 0x20
 #define DP_AUX_D 0x30
+#define DP_AUX_E 0x50
 #define DP_AUX_F 0x60
 
 #define DDC_PIN_B  0x05

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2fd92a886789494fc3276ab850ab545ecc3a5083..c52060a353176d384f5cfd91a4cf81e4d7532710 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2640,6 +2640,9 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
                                            GEN9_AUX_CHANNEL_C |
                                            GEN9_AUX_CHANNEL_D;
 
+                       if (INTEL_GEN(dev_priv) >= 11)
+                               tmp_mask |= ICL_AUX_CHANNEL_E;
+
                        if (IS_CNL_WITH_PORT_F(dev_priv) ||
                            INTEL_GEN(dev_priv) >= 11)
                                tmp_mask |= CNL_AUX_CHANNEL_F;
@@ -3921,6 +3924,9 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
                de_pipe_masked |= GEN8_DE_PIPE_IRQ_FAULT_ERRORS;
        }
 
+       if (INTEL_GEN(dev_priv) >= 11)
+               de_port_masked |= ICL_AUX_CHANNEL_E;
+
        if (IS_CNL_WITH_PORT_F(dev_priv) || INTEL_GEN(dev_priv) >= 11)
                de_port_masked |= CNL_AUX_CHANNEL_F;
 

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c96a3aec086cc56284407180e7dd15355f91f0b5..140f6a27d69623997f3865966510024bf7c01436 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5315,6 +5315,13 @@ enum {
 #define _DPD_AUX_CH_DATA4      (dev_priv->info.display_mmio_offset + 0x64320)
 #define _DPD_AUX_CH_DATA5      (dev_priv->info.display_mmio_offset + 0x64324)
 
+#define _DPE_AUX_CH_CTL                (dev_priv->info.display_mmio_offset + 0x64410)
+#define _DPE_AUX_CH_DATA1      (dev_priv->info.display_mmio_offset + 0x64414)
+#define _DPE_AUX_CH_DATA2      (dev_priv->info.display_mmio_offset + 0x64418)
+#define _DPE_AUX_CH_DATA3      (dev_priv->info.display_mmio_offset + 0x6441c)
+#define _DPE_AUX_CH_DATA4      (dev_priv->info.display_mmio_offset + 0x64420)
+#define _DPE_AUX_CH_DATA5      (dev_priv->info.display_mmio_offset + 0x64424)
+
 #define _DPF_AUX_CH_CTL                (dev_priv->info.display_mmio_offset + 0x64510)
 #define _DPF_AUX_CH_DATA1      (dev_priv->info.display_mmio_offset + 0x64514)
 #define _DPF_AUX_CH_DATA2      (dev_priv->info.display_mmio_offset + 0x64518)
@@ -7019,6 +7026,7 @@ enum {
 #define GEN8_DE_PORT_IMR _MMIO(0x44444)
 #define GEN8_DE_PORT_IIR _MMIO(0x44448)
 #define GEN8_DE_PORT_IER _MMIO(0x4444c)
+#define  ICL_AUX_CHANNEL_E             (1 << 29)
 #define  CNL_AUX_CHANNEL_F             (1 << 28)
 #define  GEN9_AUX_CHANNEL_D            (1 << 27)
 #define  GEN9_AUX_CHANNEL_C            (1 << 26)

diff --git a/drivers/gpu/drm/i915/intel_display.h b/drivers/gpu/drm/i915/intel_display.h
index c88185ed75944d7a4412446c2d762e98d299fbda..dfb02da73ac86199810ada1cc1f8e043a2ff2123 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.h
+++ b/drivers/gpu/drm/i915/intel_display.h
@@ -155,7 +155,7 @@ enum aux_ch {
        AUX_CH_B,
        AUX_CH_C,
        AUX_CH_D,
-       _AUX_CH_E, /* does not exist */
+       AUX_CH_E, /* ICL+ */
        AUX_CH_F,
 };
 
@@ -196,6 +196,7 @@ enum intel_display_power_domain {
        POWER_DOMAIN_AUX_B,
        POWER_DOMAIN_AUX_C,
        POWER_DOMAIN_AUX_D,
+       POWER_DOMAIN_AUX_E,
        POWER_DOMAIN_AUX_F,
        POWER_DOMAIN_AUX_IO_A,
        POWER_DOMAIN_GMBUS,

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 37b9f62aeb6e80b5d27561282ce501efda026945..40ffd91631755b8d80a1a4f7135234480b1620a8 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1347,6 +1347,9 @@ static enum aux_ch intel_aux_ch(struct intel_dp *intel_dp)
        case DP_AUX_D:
                aux_ch = AUX_CH_D;
                break;
+       case DP_AUX_E:
+               aux_ch = AUX_CH_E;
+               break;
        case DP_AUX_F:
                aux_ch = AUX_CH_F;
                break;
@@ -1374,6 +1377,8 @@ intel_aux_power_domain(struct intel_dp *intel_dp)
                return POWER_DOMAIN_AUX_C;
        case AUX_CH_D:
                return POWER_DOMAIN_AUX_D;
+       case AUX_CH_E:
+               return POWER_DOMAIN_AUX_E;
        case AUX_CH_F:
                return POWER_DOMAIN_AUX_F;
        default:
@@ -1460,6 +1465,7 @@ static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)
        case AUX_CH_B:
        case AUX_CH_C:
        case AUX_CH_D:
+       case AUX_CH_E:
        case AUX_CH_F:
                return DP_AUX_CH_CTL(aux_ch);
        default:
@@ -1478,6 +1484,7 @@ static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index)
        case AUX_CH_B:
        case AUX_CH_C:
        case AUX_CH_D:
+       case AUX_CH_E:
        case AUX_CH_F:
                return DP_AUX_CH_DATA(aux_ch, index);
        default:

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 53a6eaa9671abb5afcf90136e1ece0c5014d74d1..de3a81034f779b72a73aebbfb112de0050f27da8 100644 (file)
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -128,6 +128,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
                return "AUX_C";
        case POWER_DOMAIN_AUX_D:
                return "AUX_D";
+       case POWER_DOMAIN_AUX_E:
+               return "AUX_E";
        case POWER_DOMAIN_AUX_F:
                return "AUX_F";
        case POWER_DOMAIN_AUX_IO_A: