drm/i915/display: Take care of VSC select field in video dip ctl register

We need to configure VSC Select field in video dip ctl if we want to have
e.g. colorimetry date in our VSC SDP.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Tested-by: Shawn Lee <shawn.c.lee@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231220103609.1384523-8-jouni.hogander@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 39e4f5f7c81715666fee6f4451e22b62aef4879d..eedef8121ff7c722d49f1813dadf58bfae98f816 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -523,10 +523,12 @@ void hsw_write_infoframe(struct intel_encoder *encoder,
                               0);
 
        /* Wa_14013475917 */
-       if (IS_DISPLAY_VER(dev_priv, 13, 14) && crtc_state->has_psr && type == DP_SDP_VSC)
-               return;
+       if (!(IS_DISPLAY_VER(dev_priv, 13, 14) && crtc_state->has_psr && type == DP_SDP_VSC))
+               val |= hsw_infoframe_enable(type);
+
+       if (type == DP_SDP_VSC)
+               val |= VSC_DIP_HW_DATA_SW_HEA;
 
-       val |= hsw_infoframe_enable(type);
        intel_de_write(dev_priv, ctl_reg, val);
        intel_de_posting_read(dev_priv, ctl_reg);
 }