CTL_INVALID_BIT, CTL_INVALID_BIT, CTL_INVALID_BIT, CTL_INVALID_BIT, 0,
1, 2, 3, CTL_INVALID_BIT, CTL_INVALID_BIT};
-static const struct dpu_ctl_cfg *_ctl_offset(enum dpu_ctl ctl,
- const struct dpu_mdss_cfg *m,
- void __iomem *addr,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- for (i = 0; i < m->ctl_count; i++) {
- if (ctl == m->ctl[i].id) {
- b->blk_addr = addr + m->ctl[i].base;
- b->log_mask = DPU_DBG_MASK_CTL;
- return &m->ctl[i];
- }
- }
- return ERR_PTR(-ENOMEM);
-}
-
static int _mixer_stages(const struct dpu_lm_cfg *mixer, int count,
enum dpu_lm lm)
{
ops->set_active_pipes = dpu_hw_ctl_set_fetch_pipe_active;
};
-struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
+struct dpu_hw_ctl *dpu_hw_ctl_init(const struct dpu_ctl_cfg *cfg,
void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+ u32 mixer_count,
+ const struct dpu_lm_cfg *mixer)
{
struct dpu_hw_ctl *c;
- const struct dpu_ctl_cfg *cfg;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
- cfg = _ctl_offset(idx, m, addr, &c->hw);
- if (IS_ERR_OR_NULL(cfg)) {
- kfree(c);
- pr_err("failed to create dpu_hw_ctl %d\n", idx);
- return ERR_PTR(-EINVAL);
- }
+ c->hw.blk_addr = addr + cfg->base;
+ c->hw.log_mask = DPU_DBG_MASK_CTL;
c->caps = cfg;
_setup_ctl_ops(&c->ops, c->caps->features);
- c->idx = idx;
- c->mixer_count = m->mixer_count;
- c->mixer_hw_caps = m->mixer;
+ c->idx = cfg->id;
+ c->mixer_count = mixer_count;
+ c->mixer_hw_caps = mixer;
return c;
}
}
/**
- * dpu_hw_ctl_init(): Initializes the ctl_path hw driver object.
- * should be called before accessing every ctl path registers.
- * @idx: ctl_path index for which driver object is required
+ * dpu_hw_ctl_init() - Initializes the ctl_path hw driver object.
+ * Should be called before accessing any ctl_path register.
+ * @cfg: ctl_path catalog entry for which driver object is required
* @addr: mapped register io address of MDP
- * @m : pointer to mdss catalog data
+ * @mixer_count: Number of mixers in @mixer
+ * @mixer: Pointer to an array of Layer Mixers defined in the catalog
*/
-struct dpu_hw_ctl *dpu_hw_ctl_init(enum dpu_ctl idx,
+struct dpu_hw_ctl *dpu_hw_ctl_init(const struct dpu_ctl_cfg *cfg,
void __iomem *addr,
- const struct dpu_mdss_cfg *m);
+ u32 mixer_count,
+ const struct dpu_lm_cfg *mixer);
/**
* dpu_hw_ctl_destroy(): Destroys ctl driver context
DPU_REG_WRITE(c, dsc_ctl_offset, mux_cfg);
}
-static const struct dpu_dsc_cfg *_dsc_offset(enum dpu_dsc dsc,
- const struct dpu_mdss_cfg *m,
- void __iomem *addr,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- for (i = 0; i < m->dsc_count; i++) {
- if (dsc == m->dsc[i].id) {
- b->blk_addr = addr + m->dsc[i].base;
- b->log_mask = DPU_DBG_MASK_DSC;
- return &m->dsc[i];
- }
- }
-
- return NULL;
-}
-
static void _setup_dsc_ops(struct dpu_hw_dsc_ops *ops,
unsigned long cap)
{
ops->dsc_bind_pingpong_blk = dpu_hw_dsc_bind_pingpong_blk;
};
-struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+struct dpu_hw_dsc *dpu_hw_dsc_init(const struct dpu_dsc_cfg *cfg,
+ void __iomem *addr)
{
struct dpu_hw_dsc *c;
- const struct dpu_dsc_cfg *cfg;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
- cfg = _dsc_offset(idx, m, addr, &c->hw);
- if (IS_ERR_OR_NULL(cfg)) {
- kfree(c);
- return ERR_PTR(-EINVAL);
- }
+ c->hw.blk_addr = addr + cfg->base;
+ c->hw.log_mask = DPU_DBG_MASK_DSC;
- c->idx = idx;
+ c->idx = cfg->id;
c->caps = cfg;
_setup_dsc_ops(&c->ops, c->caps->features);
};
/**
- * dpu_hw_dsc_init - initializes the dsc block for the passed dsc idx.
- * @idx: DSC index for which driver object is required
+ * dpu_hw_dsc_init() - Initializes the DSC hw driver object.
+ * @cfg: DSC catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
- * @m: Pointer to mdss catalog data
- * Returns: Error code or allocated dpu_hw_dsc context
+ * Return: Error code or allocated dpu_hw_dsc context
*/
-struct dpu_hw_dsc *dpu_hw_dsc_init(enum dpu_dsc idx, void __iomem *addr,
- const struct dpu_mdss_cfg *m);
+struct dpu_hw_dsc *dpu_hw_dsc_init(const struct dpu_dsc_cfg *cfg,
+ void __iomem *addr);
/**
* dpu_hw_dsc_destroy - destroys dsc driver context
c->ops.setup_pcc = dpu_setup_dspp_pcc;
}
-static const struct dpu_dspp_cfg *_dspp_offset(enum dpu_dspp dspp,
- const struct dpu_mdss_cfg *m,
- void __iomem *addr,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- if (!m || !addr || !b)
- return ERR_PTR(-EINVAL);
-
- for (i = 0; i < m->dspp_count; i++) {
- if (dspp == m->dspp[i].id) {
- b->blk_addr = addr + m->dspp[i].base;
- b->log_mask = DPU_DBG_MASK_DSPP;
- return &m->dspp[i];
- }
- }
-
- return ERR_PTR(-EINVAL);
-}
-
-struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+struct dpu_hw_dspp *dpu_hw_dspp_init(const struct dpu_dspp_cfg *cfg,
+ void __iomem *addr)
{
struct dpu_hw_dspp *c;
- const struct dpu_dspp_cfg *cfg;
- if (!addr || !m)
+ if (!addr)
return ERR_PTR(-EINVAL);
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
- cfg = _dspp_offset(idx, m, addr, &c->hw);
- if (IS_ERR_OR_NULL(cfg)) {
- kfree(c);
- return ERR_PTR(-EINVAL);
- }
+ c->hw.blk_addr = addr + cfg->base;
+ c->hw.log_mask = DPU_DBG_MASK_DSPP;
/* Assign ops */
- c->idx = idx;
+ c->idx = cfg->id;
c->cap = cfg;
_setup_dspp_ops(c, c->cap->features);
}
/**
- * dpu_hw_dspp_init - initializes the dspp hw driver object.
- * should be called once before accessing every dspp.
- * @idx: DSPP index for which driver object is required
+ * dpu_hw_dspp_init() - Initializes the DSPP hw driver object.
+ * should be called once before accessing every DSPP.
+ * @cfg: DSPP catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
- * @Return: pointer to structure or ERR_PTR
+ * Return: pointer to structure or ERR_PTR
*/
-struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx,
- void __iomem *addr, const struct dpu_mdss_cfg *m);
+struct dpu_hw_dspp *dpu_hw_dspp_init(const struct dpu_dspp_cfg *cfg,
+ void __iomem *addr);
/**
* dpu_hw_dspp_destroy(): Destroys DSPP driver context
/**
* dpu_hw_intr_init(): Initializes the interrupts hw object
* @addr: mapped register io address of MDP
- * @m : pointer to mdss catalog data
+ * @m: pointer to MDSS catalog data
*/
struct dpu_hw_intr *dpu_hw_intr_init(void __iomem *addr,
const struct dpu_mdss_cfg *m);
#define INTF_MISR_CTRL 0x180
#define INTF_MISR_SIGNATURE 0x184
-static const struct dpu_intf_cfg *_intf_offset(enum dpu_intf intf,
- const struct dpu_mdss_cfg *m,
- void __iomem *addr,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- for (i = 0; i < m->intf_count; i++) {
- if ((intf == m->intf[i].id) &&
- (m->intf[i].type != INTF_NONE)) {
- b->blk_addr = addr + m->intf[i].base;
- b->log_mask = DPU_DBG_MASK_INTF;
- return &m->intf[i];
- }
- }
-
- return ERR_PTR(-EINVAL);
-}
-
static void dpu_hw_intf_setup_timing_engine(struct dpu_hw_intf *ctx,
const struct intf_timing_params *p,
const struct dpu_format *fmt)
ops->collect_misr = dpu_hw_intf_collect_misr;
}
-struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+struct dpu_hw_intf *dpu_hw_intf_init(const struct dpu_intf_cfg *cfg,
+ void __iomem *addr)
{
struct dpu_hw_intf *c;
- const struct dpu_intf_cfg *cfg;
+
+ if (cfg->type == INTF_NONE) {
+ DPU_DEBUG("Skip intf %d with type NONE\n", cfg->id - INTF_0);
+ return NULL;
+ }
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
- cfg = _intf_offset(idx, m, addr, &c->hw);
- if (IS_ERR_OR_NULL(cfg)) {
- kfree(c);
- pr_err("failed to create dpu_hw_intf %d\n", idx);
- return ERR_PTR(-EINVAL);
- }
+ c->hw.blk_addr = addr + cfg->base;
+ c->hw.log_mask = DPU_DBG_MASK_INTF;
/*
* Assign ops
*/
- c->idx = idx;
+ c->idx = cfg->id;
c->cap = cfg;
_setup_intf_ops(&c->ops, c->cap->features);
};
/**
- * dpu_hw_intf_init(): Initializes the intf driver for the passed
- * interface idx.
- * @idx: interface index for which driver object is required
+ * dpu_hw_intf_init() - Initializes the INTF driver for the passed
+ * interface catalog entry.
+ * @cfg: interface catalog entry for which driver object is required
* @addr: mapped register io address of MDP
- * @m : pointer to mdss catalog data
*/
-struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m);
+struct dpu_hw_intf *dpu_hw_intf_init(const struct dpu_intf_cfg *cfg,
+ void __iomem *addr);
/**
* dpu_hw_intf_destroy(): Destroys INTF driver context
#define LM_MISR_SIGNATURE 0x314
-static const struct dpu_lm_cfg *_lm_offset(enum dpu_lm mixer,
- const struct dpu_mdss_cfg *m,
- void __iomem *addr,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- for (i = 0; i < m->mixer_count; i++) {
- if (mixer == m->mixer[i].id) {
- b->blk_addr = addr + m->mixer[i].base;
- b->log_mask = DPU_DBG_MASK_LM;
- return &m->mixer[i];
- }
- }
-
- return ERR_PTR(-ENOMEM);
-}
-
/**
* _stage_offset(): returns the relative offset of the blend registers
* for the stage to be setup
DPU_REG_WRITE(c, LM_OP_MODE, op_mode);
}
-static void _setup_mixer_ops(const struct dpu_mdss_cfg *m,
- struct dpu_hw_lm_ops *ops,
+static void _setup_mixer_ops(struct dpu_hw_lm_ops *ops,
unsigned long features)
{
ops->setup_mixer_out = dpu_hw_lm_setup_out;
ops->collect_misr = dpu_hw_lm_collect_misr;
}
-struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+struct dpu_hw_mixer *dpu_hw_lm_init(const struct dpu_lm_cfg *cfg,
+ void __iomem *addr)
{
struct dpu_hw_mixer *c;
- const struct dpu_lm_cfg *cfg;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
- cfg = _lm_offset(idx, m, addr, &c->hw);
- if (IS_ERR_OR_NULL(cfg)) {
- kfree(c);
- return ERR_PTR(-EINVAL);
- }
+ c->hw.blk_addr = addr + cfg->base;
+ c->hw.log_mask = DPU_DBG_MASK_LM;
/* Assign ops */
- c->idx = idx;
+ c->idx = cfg->id;
c->cap = cfg;
- _setup_mixer_ops(m, &c->ops, c->cap->features);
+ _setup_mixer_ops(&c->ops, c->cap->features);
return c;
}
}
/**
- * dpu_hw_lm_init(): Initializes the mixer hw driver object.
+ * dpu_hw_lm_init() - Initializes the mixer hw driver object.
* should be called once before accessing every mixer.
- * @idx: mixer index for which driver object is required
+ * @cfg: mixer catalog entry for which driver object is required
* @addr: mapped register io address of MDP
- * @m : pointer to mdss catalog data
*/
-struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m);
+struct dpu_hw_mixer *dpu_hw_lm_init(const struct dpu_lm_cfg *cfg,
+ void __iomem *addr);
/**
* dpu_hw_lm_destroy(): Destroys layer mixer driver context
#define MERGE_3D_MUX 0x000
#define MERGE_3D_MODE 0x004
-static const struct dpu_merge_3d_cfg *_merge_3d_offset(enum dpu_merge_3d idx,
- const struct dpu_mdss_cfg *m,
- void __iomem *addr,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- for (i = 0; i < m->merge_3d_count; i++) {
- if (idx == m->merge_3d[i].id) {
- b->blk_addr = addr + m->merge_3d[i].base;
- b->log_mask = DPU_DBG_MASK_PINGPONG;
- return &m->merge_3d[i];
- }
- }
-
- return ERR_PTR(-EINVAL);
-}
-
static void dpu_hw_merge_3d_setup_3d_mode(struct dpu_hw_merge_3d *merge_3d,
enum dpu_3d_blend_mode mode_3d)
{
c->ops.setup_3d_mode = dpu_hw_merge_3d_setup_3d_mode;
};
-struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(enum dpu_merge_3d idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(const struct dpu_merge_3d_cfg *cfg,
+ void __iomem *addr)
{
struct dpu_hw_merge_3d *c;
- const struct dpu_merge_3d_cfg *cfg;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
- cfg = _merge_3d_offset(idx, m, addr, &c->hw);
- if (IS_ERR_OR_NULL(cfg)) {
- kfree(c);
- return ERR_PTR(-EINVAL);
- }
+ c->hw.blk_addr = addr + cfg->base;
+ c->hw.log_mask = DPU_DBG_MASK_PINGPONG;
- c->idx = idx;
+ c->idx = cfg->id;
c->caps = cfg;
_setup_merge_3d_ops(c, c->caps->features);
}
/**
- * dpu_hw_merge_3d_init - initializes the merge_3d driver for the passed
- * merge_3d idx.
- * @idx: Pingpong index for which driver object is required
+ * dpu_hw_merge_3d_init() - Initializes the merge_3d driver for the passed
+ * merge3d catalog entry.
+ * @cfg: Pingpong catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
- * @m: Pointer to mdss catalog data
- * Returns: Error code or allocated dpu_hw_merge_3d context
+ * Return: Error code or allocated dpu_hw_merge_3d context
*/
-struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(enum dpu_merge_3d idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m);
+struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(const struct dpu_merge_3d_cfg *cfg,
+ void __iomem *addr);
/**
* dpu_hw_merge_3d_destroy - destroys merge_3d driver context
0, 0, 0, 0, 0, 0, 0, 1, 2
};
-static const struct dpu_pingpong_cfg *_pingpong_offset(enum dpu_pingpong pp,
- const struct dpu_mdss_cfg *m,
- void __iomem *addr,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- for (i = 0; i < m->pingpong_count; i++) {
- if (pp == m->pingpong[i].id) {
- b->blk_addr = addr + m->pingpong[i].base;
- b->log_mask = DPU_DBG_MASK_PINGPONG;
- return &m->pingpong[i];
- }
- }
-
- return ERR_PTR(-EINVAL);
-}
-
static void dpu_hw_pp_setup_dither(struct dpu_hw_pingpong *pp,
struct dpu_hw_dither_cfg *cfg)
{
c->ops.setup_dither = dpu_hw_pp_setup_dither;
};
-struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+struct dpu_hw_pingpong *dpu_hw_pingpong_init(const struct dpu_pingpong_cfg *cfg,
+ void __iomem *addr)
{
struct dpu_hw_pingpong *c;
- const struct dpu_pingpong_cfg *cfg;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
- cfg = _pingpong_offset(idx, m, addr, &c->hw);
- if (IS_ERR_OR_NULL(cfg)) {
- kfree(c);
- return ERR_PTR(-EINVAL);
- }
+ c->hw.blk_addr = addr + cfg->base;
+ c->hw.log_mask = DPU_DBG_MASK_PINGPONG;
- c->idx = idx;
+ c->idx = cfg->id;
c->caps = cfg;
_setup_pingpong_ops(c, c->caps->features);
}
/**
- * dpu_hw_pingpong_init - initializes the pingpong driver for the passed
- * pingpong idx.
- * @idx: Pingpong index for which driver object is required
+ * dpu_hw_pingpong_init() - initializes the pingpong driver for the passed
+ * pingpong catalog entry.
+ * @cfg: Pingpong catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
- * @m: Pointer to mdss catalog data
- * Returns: Error code or allocated dpu_hw_pingpong context
+ * Return: Error code or allocated dpu_hw_pingpong context
*/
-struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m);
+struct dpu_hw_pingpong *dpu_hw_pingpong_init(const struct dpu_pingpong_cfg *cfg,
+ void __iomem *addr);
/**
* dpu_hw_pingpong_destroy - destroys pingpong driver context
}
#endif
-
-static const struct dpu_sspp_cfg *_sspp_offset(enum dpu_sspp sspp,
- void __iomem *addr,
- const struct dpu_mdss_cfg *catalog,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- if ((sspp < SSPP_MAX) && catalog && addr && b) {
- for (i = 0; i < catalog->sspp_count; i++) {
- if (sspp == catalog->sspp[i].id) {
- b->blk_addr = addr + catalog->sspp[i].base;
- b->log_mask = DPU_DBG_MASK_SSPP;
- return &catalog->sspp[i];
- }
- }
- }
-
- return ERR_PTR(-ENOMEM);
-}
-
-struct dpu_hw_sspp *dpu_hw_sspp_init(enum dpu_sspp idx,
- void __iomem *addr, const struct dpu_mdss_cfg *catalog)
+struct dpu_hw_sspp *dpu_hw_sspp_init(const struct dpu_sspp_cfg *cfg,
+ void __iomem *addr, const struct dpu_ubwc_cfg *ubwc)
{
struct dpu_hw_sspp *hw_pipe;
- const struct dpu_sspp_cfg *cfg;
- if (!addr || !catalog)
+ if (!addr || !ubwc)
return ERR_PTR(-EINVAL);
hw_pipe = kzalloc(sizeof(*hw_pipe), GFP_KERNEL);
if (!hw_pipe)
return ERR_PTR(-ENOMEM);
- cfg = _sspp_offset(idx, addr, catalog, &hw_pipe->hw);
- if (IS_ERR_OR_NULL(cfg)) {
- kfree(hw_pipe);
- return ERR_PTR(-EINVAL);
- }
+ hw_pipe->hw.blk_addr = addr + cfg->base;
+ hw_pipe->hw.log_mask = DPU_DBG_MASK_SSPP;
/* Assign ops */
- hw_pipe->ubwc = catalog->ubwc;
- hw_pipe->idx = idx;
+ hw_pipe->ubwc = ubwc;
+ hw_pipe->idx = cfg->id;
hw_pipe->cap = cfg;
_setup_layer_ops(hw_pipe, hw_pipe->cap->features);
* struct dpu_hw_sspp - pipe description
* @base: hardware block base structure
* @hw: block hardware details
- * @ubwc: ubwc configuration data
+ * @ubwc: UBWC configuration data
* @idx: pipe index
* @cap: pointer to layer_cfg
* @ops: pointer to operations possible for this pipe
struct dpu_kms;
/**
- * dpu_hw_sspp_init - initializes the sspp hw driver object.
+ * dpu_hw_sspp_init() - Initializes the sspp hw driver object.
* Should be called once before accessing every pipe.
- * @idx: Pipe index for which driver object is required
+ * @cfg: Pipe catalog entry for which driver object is required
* @addr: Mapped register io address of MDP
- * @catalog : Pointer to mdss catalog data
+ * @ubwc: UBWC configuration data
*/
-struct dpu_hw_sspp *dpu_hw_sspp_init(enum dpu_sspp idx,
- void __iomem *addr, const struct dpu_mdss_cfg *catalog);
+struct dpu_hw_sspp *dpu_hw_sspp_init(const struct dpu_sspp_cfg *cfg,
+ void __iomem *addr, const struct dpu_ubwc_cfg *ubwc);
/**
* dpu_hw_sspp_destroy(): Destroys SSPP driver context
ops->set_write_gather_en = dpu_hw_set_write_gather_en;
}
-static const struct dpu_vbif_cfg *_top_offset(enum dpu_vbif vbif,
- const struct dpu_mdss_cfg *m,
- void __iomem *addr,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- for (i = 0; i < m->vbif_count; i++) {
- if (vbif == m->vbif[i].id) {
- b->blk_addr = addr + m->vbif[i].base;
- b->log_mask = DPU_DBG_MASK_VBIF;
- return &m->vbif[i];
- }
- }
-
- return ERR_PTR(-EINVAL);
-}
-
-struct dpu_hw_vbif *dpu_hw_vbif_init(enum dpu_vbif idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m)
+struct dpu_hw_vbif *dpu_hw_vbif_init(const struct dpu_vbif_cfg *cfg,
+ void __iomem *addr)
{
struct dpu_hw_vbif *c;
- const struct dpu_vbif_cfg *cfg;
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
- cfg = _top_offset(idx, m, addr, &c->hw);
- if (IS_ERR_OR_NULL(cfg)) {
- kfree(c);
- return ERR_PTR(-EINVAL);
- }
+ c->hw.blk_addr = addr + cfg->base;
+ c->hw.log_mask = DPU_DBG_MASK_VBIF;
/*
* Assign ops
*/
- c->idx = idx;
+ c->idx = cfg->id;
c->cap = cfg;
_setup_vbif_ops(&c->ops, c->cap->features);
};
/**
- * dpu_hw_vbif_init - initializes the vbif driver for the passed interface idx
- * @idx: Interface index for which driver object is required
+ * dpu_hw_vbif_init() - Initializes the VBIF driver for the passed
+ * VBIF catalog entry.
+ * @cfg: VBIF catalog entry for which driver object is required
* @addr: Mapped register io address of MDSS
- * @m: Pointer to mdss catalog data
*/
-struct dpu_hw_vbif *dpu_hw_vbif_init(enum dpu_vbif idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m);
+struct dpu_hw_vbif *dpu_hw_vbif_init(const struct dpu_vbif_cfg *cfg,
+ void __iomem *addr);
void dpu_hw_vbif_destroy(struct dpu_hw_vbif *vbif);
/* WB_QOS_CTRL */
#define WB_QOS_CTRL_DANGER_SAFE_EN BIT(0)
-static const struct dpu_wb_cfg *_wb_offset(enum dpu_wb wb,
- const struct dpu_mdss_cfg *m, void __iomem *addr,
- struct dpu_hw_blk_reg_map *b)
-{
- int i;
-
- for (i = 0; i < m->wb_count; i++) {
- if (wb == m->wb[i].id) {
- b->blk_addr = addr + m->wb[i].base;
- b->log_mask = DPU_DBG_MASK_WB;
- return &m->wb[i];
- }
- }
- return ERR_PTR(-EINVAL);
-}
-
static void dpu_hw_wb_setup_outaddress(struct dpu_hw_wb *ctx,
struct dpu_hw_wb_cfg *data)
{
ops->bind_pingpong_blk = dpu_hw_wb_bind_pingpong_blk;
}
-struct dpu_hw_wb *dpu_hw_wb_init(enum dpu_wb idx,
- void __iomem *addr, const struct dpu_mdss_cfg *m)
+struct dpu_hw_wb *dpu_hw_wb_init(const struct dpu_wb_cfg *cfg,
+ void __iomem *addr)
{
struct dpu_hw_wb *c;
- const struct dpu_wb_cfg *cfg;
- if (!addr || !m)
+ if (!addr)
return ERR_PTR(-EINVAL);
c = kzalloc(sizeof(*c), GFP_KERNEL);
if (!c)
return ERR_PTR(-ENOMEM);
- cfg = _wb_offset(idx, m, addr, &c->hw);
- if (IS_ERR(cfg)) {
- WARN(1, "Unable to find wb idx=%d\n", idx);
- kfree(c);
- return ERR_PTR(-EINVAL);
- }
+ c->hw.blk_addr = addr + cfg->base;
+ c->hw.log_mask = DPU_DBG_MASK_WB;
/* Assign ops */
- c->idx = idx;
+ c->idx = cfg->id;
c->caps = cfg;
_setup_wb_ops(&c->ops, c->caps->features);
};
/**
- * dpu_hw_wb_init(): Initializes and return writeback hw driver object.
- * @idx: wb_path index for which driver object is required
+ * dpu_hw_wb_init() - Initializes the writeback hw driver object.
+ * @cfg: wb_path catalog entry for which driver object is required
* @addr: mapped register io address of MDP
- * @m : pointer to mdss catalog data
+ * Return: Error code or allocated dpu_hw_wb context
*/
-struct dpu_hw_wb *dpu_hw_wb_init(enum dpu_wb idx,
- void __iomem *addr,
- const struct dpu_mdss_cfg *m);
+struct dpu_hw_wb *dpu_hw_wb_init(const struct dpu_wb_cfg *cfg,
+ void __iomem *addr);
/**
* dpu_hw_wb_destroy(): Destroy writeback hw driver object.
}
for (i = 0; i < dpu_kms->catalog->vbif_count; i++) {
- u32 vbif_idx = dpu_kms->catalog->vbif[i].id;
-
- dpu_kms->hw_vbif[vbif_idx] = dpu_hw_vbif_init(vbif_idx,
- dpu_kms->vbif[vbif_idx], dpu_kms->catalog);
- if (IS_ERR(dpu_kms->hw_vbif[vbif_idx])) {
- rc = PTR_ERR(dpu_kms->hw_vbif[vbif_idx]);
- DPU_ERROR("failed to init vbif %d: %d\n", vbif_idx, rc);
- dpu_kms->hw_vbif[vbif_idx] = NULL;
+ struct dpu_hw_vbif *hw;
+ const struct dpu_vbif_cfg *vbif = &dpu_kms->catalog->vbif[i];
+
+ hw = dpu_hw_vbif_init(vbif, dpu_kms->vbif[vbif->id]);
+ if (IS_ERR(hw)) {
+ rc = PTR_ERR(hw);
+ DPU_ERROR("failed to init vbif %d: %d\n", vbif->id, rc);
goto power_error;
}
+
+ dpu_kms->hw_vbif[vbif->id] = hw;
}
rc = dpu_core_perf_init(&dpu_kms->perf, dev, dpu_kms->catalog,
DPU_ERROR("skip mixer %d with invalid id\n", lm->id);
continue;
}
- hw = dpu_hw_lm_init(lm->id, mmio, cat);
+ hw = dpu_hw_lm_init(lm, mmio);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed lm object creation: err %d\n", rc);
DPU_ERROR("skip merge_3d %d with invalid id\n", merge_3d->id);
continue;
}
- hw = dpu_hw_merge_3d_init(merge_3d->id, mmio, cat);
+ hw = dpu_hw_merge_3d_init(merge_3d, mmio);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed merge_3d object creation: err %d\n",
DPU_ERROR("skip pingpong %d with invalid id\n", pp->id);
continue;
}
- hw = dpu_hw_pingpong_init(pp->id, mmio, cat);
+ hw = dpu_hw_pingpong_init(pp, mmio);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed pingpong object creation: err %d\n",
struct dpu_hw_intf *hw;
const struct dpu_intf_cfg *intf = &cat->intf[i];
- if (intf->type == INTF_NONE) {
- DPU_DEBUG("skip intf %d with type none\n", i);
- continue;
- }
if (intf->id < INTF_0 || intf->id >= INTF_MAX) {
DPU_ERROR("skip intf %d with invalid id\n", intf->id);
continue;
}
- hw = dpu_hw_intf_init(intf->id, mmio, cat);
+ hw = dpu_hw_intf_init(intf, mmio);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed intf object creation: err %d\n", rc);
continue;
}
- hw = dpu_hw_wb_init(wb->id, mmio, cat);
+ hw = dpu_hw_wb_init(wb, mmio);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed wb object creation: err %d\n", rc);
DPU_ERROR("skip ctl %d with invalid id\n", ctl->id);
continue;
}
- hw = dpu_hw_ctl_init(ctl->id, mmio, cat);
+ hw = dpu_hw_ctl_init(ctl, mmio, cat->mixer_count, cat->mixer);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed ctl object creation: err %d\n", rc);
DPU_ERROR("skip dspp %d with invalid id\n", dspp->id);
continue;
}
- hw = dpu_hw_dspp_init(dspp->id, mmio, cat);
+ hw = dpu_hw_dspp_init(dspp, mmio);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed dspp object creation: err %d\n", rc);
struct dpu_hw_dsc *hw;
const struct dpu_dsc_cfg *dsc = &cat->dsc[i];
- hw = dpu_hw_dsc_init(dsc->id, mmio, cat);
+ hw = dpu_hw_dsc_init(dsc, mmio);
if (IS_ERR_OR_NULL(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed dsc object creation: err %d\n", rc);
continue;
}
- hw = dpu_hw_sspp_init(sspp->id, mmio, cat);
+ hw = dpu_hw_sspp_init(sspp, mmio, cat->ubwc);
if (IS_ERR(hw)) {
rc = PTR_ERR(hw);
DPU_ERROR("failed sspp object creation: err %d\n", rc);
projects / nvme.git / commitdiff