drm_crtc_helper_add(&nv_crtc->base, &nv04_crtc_helper_funcs);
        drm_mode_crtc_set_gamma_size(&nv_crtc->base, 256);
 
-       ret = nouveau_bo_new(dev, 64*64*4, 0x100, TTM_PL_FLAG_VRAM,
-                            0, 0x0000, NULL, NULL, &nv_crtc->cursor.nvbo);
+       ret = nouveau_bo_new(&nouveau_drm(dev)->client, 64*64*4, 0x100,
+                            TTM_PL_FLAG_VRAM, 0, 0x0000, NULL, NULL,
+                            &nv_crtc->cursor.nvbo);
        if (!ret) {
                ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM, false);
                if (!ret) {
 
 }
 
 int
-nouveau_bo_new(struct drm_device *dev, int size, int align,
+nouveau_bo_new(struct nouveau_cli *cli, int size, int align,
               uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,
               struct sg_table *sg, struct reservation_object *robj,
               struct nouveau_bo **pnvbo)
 {
-       struct nouveau_drm *drm = nouveau_drm(dev);
+       struct nouveau_drm *drm = nouveau_drm(cli->dev);
        struct nouveau_bo *nvbo;
        size_t acc_size;
        int ret;
        nvbo->tile_mode = tile_mode;
        nvbo->tile_flags = tile_flags;
        nvbo->bo.bdev = &drm->ttm.bdev;
+       nvbo->cli = cli;
 
        if (!nvxx_device(&drm->device)->func->cpu_coherent)
                nvbo->force_coherent = flags & TTM_PL_FLAG_UNCACHED;
 
        struct list_head vma_list;
        unsigned page_shift;
 
+       struct nouveau_cli *cli;
+
        u32 tile_mode;
        u32 tile_flags;
        struct nouveau_drm_tile *tile;
 extern struct ttm_bo_driver nouveau_bo_driver;
 
 void nouveau_bo_move_init(struct nouveau_drm *);
-int  nouveau_bo_new(struct drm_device *, int size, int align, u32 flags,
+int  nouveau_bo_new(struct nouveau_cli *, int size, int align, u32 flags,
                    u32 tile_mode, u32 tile_flags, struct sg_table *sg,
                    struct reservation_object *robj,
                    struct nouveau_bo **);
 
        if (nouveau_vram_pushbuf)
                target = TTM_PL_FLAG_VRAM;
 
-       ret = nouveau_bo_new(drm->dev, size, 0, target, 0, 0, NULL, NULL,
+       ret = nouveau_bo_new(cli, size, 0, target, 0, 0, NULL, NULL,
                            &chan->push.buffer);
        if (ret == 0) {
                ret = nouveau_bo_pin(chan->push.buffer, target, false);
 
        if (domain & NOUVEAU_GEM_DOMAIN_COHERENT)
                flags |= TTM_PL_FLAG_UNCACHED;
 
-       ret = nouveau_bo_new(dev, size, align, flags, tile_mode,
+       ret = nouveau_bo_new(&drm->client, size, align, flags, tile_mode,
                             tile_flags, NULL, NULL, pnvbo);
        if (ret)
                return ret;
 
                                                         struct dma_buf_attachment *attach,
                                                         struct sg_table *sg)
 {
+       struct nouveau_drm *drm = nouveau_drm(dev);
        struct nouveau_bo *nvbo;
        struct reservation_object *robj = attach->dmabuf->resv;
        u32 flags = 0;
        flags = TTM_PL_FLAG_TT;
 
        ww_mutex_lock(&robj->lock, NULL);
-       ret = nouveau_bo_new(dev, attach->dmabuf->size, 0, flags, 0, 0,
+       ret = nouveau_bo_new(&drm->client, attach->dmabuf->size, 0, flags, 0, 0,
                             sg, robj, &nvbo);
        ww_mutex_unlock(&robj->lock);
        if (ret)
 
        priv->base.context_base = dma_fence_context_alloc(priv->base.contexts);
        spin_lock_init(&priv->lock);
 
-       ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,
+       ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM,
                             0, 0x0000, NULL, NULL, &priv->bo);
        if (!ret) {
                ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM, false);
 
        drm_crtc_helper_add(crtc, &nv50_head_help);
        drm_mode_crtc_set_gamma_size(crtc, 256);
 
-       ret = nouveau_bo_new(dev, 8192, 0x100, TTM_PL_FLAG_VRAM,
+       ret = nouveau_bo_new(&drm->client, 8192, 0x100, TTM_PL_FLAG_VRAM,
                             0, 0x0000, NULL, NULL, &head->base.lut.nvbo);
        if (!ret) {
                ret = nouveau_bo_pin(head->base.lut.nvbo, TTM_PL_FLAG_VRAM, true);
                dev->driver->driver_features |= DRIVER_ATOMIC;
 
        /* small shared memory area we use for notifiers and semaphores */
-       ret = nouveau_bo_new(dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,
+       ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM,
                             0, 0x0000, NULL, NULL, &disp->sync);
        if (!ret) {
                ret = nouveau_bo_pin(disp->sync, TTM_PL_FLAG_VRAM, true);
 
        priv->base.context_base = dma_fence_context_alloc(priv->base.contexts);
        spin_lock_init(&priv->lock);
 
-       ret = nouveau_bo_new(drm->dev, 4096, 0x1000, TTM_PL_FLAG_VRAM,
+       ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM,
                             0, 0x0000, NULL, NULL, &priv->bo);
        if (!ret) {
                ret = nouveau_bo_pin(priv->bo, TTM_PL_FLAG_VRAM, false);
 
                          * will lose CPU/GPU coherency!
                          */
                         TTM_PL_FLAG_TT | TTM_PL_FLAG_UNCACHED;
-       ret = nouveau_bo_new(drm->dev, 16 * priv->base.contexts, 0, domain, 0,
-                            0, NULL, NULL, &priv->bo);
+       ret = nouveau_bo_new(&drm->client, 16 * priv->base.contexts, 0,
+                            domain, 0, 0, NULL, NULL, &priv->bo);
        if (ret == 0) {
                ret = nouveau_bo_pin(priv->bo, domain, false);
                if (ret == 0) {
        }
 
        if (ret == 0)
-               ret = nouveau_bo_new(drm->dev, 16 * priv->base.contexts, 0,
+               ret = nouveau_bo_new(&drm->client, 16 * priv->base.contexts, 0,
                                     TTM_PL_FLAG_TT | TTM_PL_FLAG_UNCACHED, 0,
                                     0, NULL, NULL, &priv->bo_gart);
        if (ret == 0) {