]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
PCI: xilinx-nwl: Enable the clock through CCF
authorHyun Kwon <hyun.kwon@xilinx.com>
Fri, 25 Jun 2021 10:48:23 +0000 (12:48 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 22 Sep 2021 09:48:00 +0000 (11:48 +0200)
commit de0a01f5296651d3a539f2d23d0db8f359483696 upstream.

Enable PCIe reference clock. There is no remove function that's why
this should be enough for simple operation.
Normally this clock is enabled by default by firmware but there are
usecases where this clock should be enabled by driver itself.
It is also good that PCIe clock is recorded in a clock framework.

Link: https://lore.kernel.org/r/ee6997a08fab582b1c6de05f8be184f3fe8d5357.1624618100.git.michal.simek@xilinx.com
Fixes: ab597d35ef11 ("PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host Controller")
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/pci/controller/pcie-xilinx-nwl.c

index 4850a1b8eec127628eb390a3cf5401078dbc3e2d..a86bd9660dae951084328b8247926913adc0a9b6 100644 (file)
@@ -6,6 +6,7 @@
  * (C) Copyright 2014 - 2015, Xilinx, Inc.
  */
 
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
@@ -169,6 +170,7 @@ struct nwl_pcie {
        u8 root_busno;
        struct nwl_msi msi;
        struct irq_domain *legacy_irq_domain;
+       struct clk *clk;
        raw_spinlock_t leg_mask_lock;
 };
 
@@ -849,6 +851,16 @@ static int nwl_pcie_probe(struct platform_device *pdev)
                return err;
        }
 
+       pcie->clk = devm_clk_get(dev, NULL);
+       if (IS_ERR(pcie->clk))
+               return PTR_ERR(pcie->clk);
+
+       err = clk_prepare_enable(pcie->clk);
+       if (err) {
+               dev_err(dev, "can't enable PCIe ref clock\n");
+               return err;
+       }
+
        err = nwl_pcie_bridge_init(pcie);
        if (err) {
                dev_err(dev, "HW Initialization failed\n");