cpufreq: qcom-nvmem: Enable cpufreq for ipq53xx

IPQ53xx have different OPPs available for the CPU based on
SoC variant. This can be determined through use of an eFuse
register present in the silicon.

Added support for ipq53xx on nvmem driver which helps to
determine OPPs at runtime based on the eFuse register which
has the CPU frequency limits. opp-supported-hw dt binding
can be used to indicate the available OPPs for each limit.

nvmem driver also creates the "cpufreq-dt" platform_device after
passing the version matching data to the OPP framework so that the
cpufreq-dt handles the actual cpufreq implementation.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
[ Viresh: Fixed subject ]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>

diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index 07181913448f4632564a1b3d0b83f67f52a15154..53da25589e5fe35eb967881f13a043948f2fc017 100644 (file)
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -180,6 +180,7 @@ static const struct of_device_id blocklist[] __initconst = {
        { .compatible = "ti,am62a7", },
        { .compatible = "ti,am62p5", },
 
+       { .compatible = "qcom,ipq5332", },
        { .compatible = "qcom,ipq6018", },
        { .compatible = "qcom,ipq8064", },
        { .compatible = "qcom,ipq8074", },

diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c
index 158c0e139185fe60d5f407dca6caff0d1e7cfaaa..4f7af70169e0f3d0c9d252a5dc48ce38982d20de 100644 (file)
--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
@@ -183,6 +183,11 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
        switch (msm_id) {
        case QCOM_ID_MSM8996:
        case QCOM_ID_APQ8096:
+       case QCOM_ID_IPQ5332:
+       case QCOM_ID_IPQ5322:
+       case QCOM_ID_IPQ5312:
+       case QCOM_ID_IPQ5302:
+       case QCOM_ID_IPQ5300:
                drv->versions = 1 << (unsigned int)(*speedbin);
                break;
        case QCOM_ID_MSM8996SG:
@@ -541,6 +546,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
        { .compatible = "qcom,msm8909", .data = &match_data_msm8909 },
        { .compatible = "qcom,msm8996", .data = &match_data_kryo },
        { .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
+       { .compatible = "qcom,ipq5332", .data = &match_data_kryo },
        { .compatible = "qcom,ipq6018", .data = &match_data_ipq6018 },
        { .compatible = "qcom,ipq8064", .data = &match_data_ipq8064 },
        { .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },