x86/smp: Allow more than 255 CPUs even without interrupt remapping

Now that external interrupt affinity can be limited to the range of
CPUs that can be reached through legacy IOAPIC RTEs and MSI, it is
possible to use additional CPUs.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>

diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index db410cb009358146f31b5ba0bbb4e50fdb9e3487..66c7cd8efb54c041c961cf0edcb493a31499b1b0 100644 (file)
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1873,11 +1873,9 @@ static __init void try_to_enable_x2apic(int remap_mode)
                }
 
                /*
-                * Without IR, all CPUs can be addressed by IOAPIC/MSI only
-                * in physical mode, and CPUs with an APIC ID that cannnot
-                * be addressed must not be brought online.
+                * Without IR, use physical mode to maximise the number of
+                * CPUs that can be addressed by IOAPIC/MSI.
                 */
-               x2apic_set_max_apicid(apic_limit);
                x2apic_phys = 1;
        }