static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
                                  struct dsp_scb_descriptor * fg_entry);
 
-static enum wide_opcode wide_opcodes[] = { 
+static const enum wide_opcode wide_opcodes[] = {
        WIDE_FOR_BEGIN_LOOP,
        WIDE_FOR_BEGIN_LOOP2,
        WIDE_COND_GOTO_ADDR,
        
        int fifo_addr, fifo_span, valid_slots;
 
-       static struct dsp_spos_control_block sposcb = {
+       static const struct dsp_spos_control_block sposcb = {
                /* 0 */ HFG_TREE_SCB,HFG_STACK,
                /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
                /* 2 */ DSP_SPOS_DC,0,
 
        return scb;
 }
 
-static u32 pcm_reader_buffer_addr[DSP_MAX_PCM_CHANNELS] = {
+static const u32 pcm_reader_buffer_addr[DSP_MAX_PCM_CHANNELS] = {
        0x0600, /* 1 */
        0x1500, /* 2 */
        0x1580, /* 3 */
        0x2400, /* 32 */
 };
 
-static u32 src_output_buffer_addr[DSP_MAX_SRC_NR] = {
+static const u32 src_output_buffer_addr[DSP_MAX_SRC_NR] = {
        0x2B80,
        0x2BA0,
        0x2BC0,
        0x2E20
 };
 
-static u32 src_delay_buffer_addr[DSP_MAX_SRC_NR] = {
+static const u32 src_delay_buffer_addr[DSP_MAX_SRC_NR] = {
        0x2480,
        0x2500,
        0x2580,