drm/amdgpu: enable gfxoff code path for navi14

Based on navi10 gfxoff logic, enable the related code
path for navi14.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 409725f408023f92d8112e228ceda561fa06ebfa..1f9105a6c0500593e7745429343571ec66a67aa4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -998,9 +998,7 @@ out:
                        return ret;
 
                /* Start rlc autoload after psp recieved all the gfx firmware */
-               if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM ||
-                   (adev->asic_type == CHIP_NAVI14 &&
-                    ucode->ucode_id == AMDGPU_UCODE_ID_RLC_G)) {
+               if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) {
                        ret = psp_rlc_autoload(psp);
                        if (ret) {
                                DRM_ERROR("Failed to start rlc autoload\n");

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 0cf7c3faa91f64b491cac2415a4d8f41457352a3..ec11bfded772f2e4b6e7e7e31014bab41b98eab6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4105,6 +4105,7 @@ static int gfx_v10_0_set_powergating_state(void *handle,
        bool enable = (state == AMD_PG_STATE_GATE) ? true : false;
        switch (adev->asic_type) {
        case CHIP_NAVI10:
+       case CHIP_NAVI14:
                if (!enable) {
                        amdgpu_gfx_off_ctrl(adev, false);
                        cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work);

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 1ac9db3aa5bc6048397add4bf1e11b439f11487e..d977d68320c977c7a3786c670f8f5622dce08aab 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -559,9 +559,6 @@ static int smu_early_init(void *handle)
        smu->pm_enabled = !!amdgpu_dpm;
        mutex_init(&smu->mutex);
 
-       if (adev->asic_type == CHIP_NAVI14)
-               adev->pm.pp_feature &= ~PP_GFXOFF_MASK;
-
        return smu_set_funcs(adev);
 }
 

diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 0e9eead6ad29b6e9b4a7595bf6672c6df7ba373d..1315958e5d811b5c040ba5ab19ce8c861248a2d0 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -1359,6 +1359,7 @@ static int smu_v11_0_gfx_off_control(struct smu_context *smu, bool enable)
        case CHIP_VEGA20:
                break;
        case CHIP_NAVI10:
+       case CHIP_NAVI14:
                if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))
                        return 0;
                mutex_lock(&smu->mutex);