#define VMX_EPT_EXTENT_GLOBAL_BIT              (1ull << 26)
 
 #define VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT      (1ull << 9) /* (41 - 32) */
+#define VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT      (1ull << 10) /* (42 - 32) */
 
 #define VMX_EPT_DEFAULT_GAW                    3
 #define VMX_EPT_MAX_GAW                                0x4
 
        return vmx_capability.vpid & VMX_VPID_EXTENT_SINGLE_CONTEXT_BIT;
 }
 
+static inline bool cpu_has_vmx_invvpid_global(void)
+{
+       return vmx_capability.vpid & VMX_VPID_EXTENT_GLOBAL_CONTEXT_BIT;
+}
+
 static inline bool cpu_has_vmx_ept(void)
 {
        return vmcs_config.cpu_based_2nd_exec_ctrl &
                __invvpid(VMX_VPID_EXTENT_SINGLE_CONTEXT, vmx->vpid, 0);
 }
 
+static inline void vpid_sync_vcpu_global(void)
+{
+       if (cpu_has_vmx_invvpid_global())
+               __invvpid(VMX_VPID_EXTENT_ALL_CONTEXT, 0, 0);
+}
+
+static inline void vpid_sync_context(struct vcpu_vmx *vmx)
+{
+       if (cpu_has_vmx_invvpid_single())
+               vpid_sync_vcpu_all(vmx);
+       else
+               vpid_sync_vcpu_global();
+}
+
 static inline void ept_sync_global(void)
 {
        if (cpu_has_vmx_invept_global())
 
 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
 {
-       vpid_sync_vcpu_all(to_vmx(vcpu));
+       vpid_sync_context(to_vmx(vcpu));
        if (enable_ept)
                ept_sync_context(construct_eptp(vcpu->arch.mmu.root_hpa));
 }
        vmx_fpu_activate(&vmx->vcpu);
        update_exception_bitmap(&vmx->vcpu);
 
-       vpid_sync_vcpu_all(vmx);
+       vpid_sync_context(vmx);
 
        ret = 0;