drm/amd/display: clean rq/dlg/ttu reg structs before calculations

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
index b8195e5a067671a9884365cde1c28b90336c6c9e..ac4451adeec9f25c04c4dab8d018d0f17467c547 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -423,6 +423,10 @@ static void dcn_bw_calc_rq_dlg_ttu(
        int total_flip_bytes = 0;
        int i;
 
+       memset(dlg_regs, 0, sizeof(*dlg_regs));
+       memset(ttu_regs, 0, sizeof(*ttu_regs));
+       memset(rq_regs, 0, sizeof(*rq_regs));
+
        for (i = 0; i < number_of_planes; i++) {
                total_active_bw += v->read_bandwidth[i];
                total_prefetch_bw += v->prefetch_bandwidth[i];

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 7d9c10b6d99b6f59a97611890939824d42bd26d0..cc12c4757f8b67560bf3cffeac2fc5a11f6eedea 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -151,19 +151,23 @@ static void dcn10_log_hubp_states(struct dc *dc)
 
        DTN_INFO("\n=========RQ========\n");
        DTN_INFO("HUBP:  drq_exp_m  prq_exp_m  mrq_exp_m  crq_exp_m  plane1_ba  L:chunk_s  min_chu_s  meta_ch_s"
+               "  min_m_c_s  dpte_gr_s  mpte_gr_s  swath_hei  pte_row_h  C:chunk_s  min_chu_s  meta_ch_s"
                "  min_m_c_s  dpte_gr_s  mpte_gr_s  swath_hei  pte_row_h\n");
        for (i = 0; i < pool->pipe_count; i++) {
                struct dcn_hubp_state *s = &(TO_DCN10_HUBP(pool->hubps[i])->state);
                struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs;
 
                if (!s->blank_en)
-                       DTN_INFO("[%2d]:  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh\n",
+                       DTN_INFO("[%2d]:  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh  %8xh\n",
                                pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expansion_mode,
                                rq_regs->crq_expansion_mode, rq_regs->plane1_base_address, rq_regs->rq_regs_l.chunk_size,
                                rq_regs->rq_regs_l.min_chunk_size, rq_regs->rq_regs_l.meta_chunk_size,
                                rq_regs->rq_regs_l.min_meta_chunk_size, rq_regs->rq_regs_l.dpte_group_size,
                                rq_regs->rq_regs_l.mpte_group_size, rq_regs->rq_regs_l.swath_height,
-                               rq_regs->rq_regs_l.pte_row_height_linear);
+                               rq_regs->rq_regs_l.pte_row_height_linear, rq_regs->rq_regs_c.chunk_size, rq_regs->rq_regs_c.min_chunk_size,
+                               rq_regs->rq_regs_c.meta_chunk_size, rq_regs->rq_regs_c.min_meta_chunk_size,
+                               rq_regs->rq_regs_c.dpte_group_size, rq_regs->rq_regs_c.mpte_group_size,
+                               rq_regs->rq_regs_c.swath_height, rq_regs->rq_regs_c.pte_row_height_linear);
        }
 
        DTN_INFO("========DLG========\n");

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
index 0efbf411667a51ac5bf576b67bc3c5cbbfcf247f..c2037daa8e6666d7b2dd9b76477e03f7472e9220 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c
@@ -239,8 +239,6 @@ void dml1_extract_rq_regs(
        extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_l), rq_param.sizing.rq_l);
        if (rq_param.yuv420)
                extract_rq_sizing_regs(mode_lib, &(rq_regs->rq_regs_c), rq_param.sizing.rq_c);
-       else
-               memset(&(rq_regs->rq_regs_c), 0, sizeof(rq_regs->rq_regs_c));
 
        rq_regs->rq_regs_l.swath_height = dml_log2(rq_param.dlg.rq_l.swath_height);
        rq_regs->rq_regs_c.swath_height = dml_log2(rq_param.dlg.rq_c.swath_height);