MIPS: SNI: Fix spurious interrupts

On A20R machines the interrupt pending bits in cause register need to be
updated by requesting the chipset to do it. This needs to be done to
find the interrupt cause and after interrupt service. In
commit 0b888c7f3a03 ("MIPS: SNI: Convert to new irq_chip functions") the
function to do after service update got lost, which caused spurious
interrupts.

Fixes: 0b888c7f3a03 ("MIPS: SNI: Convert to new irq_chip functions")
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c
index b09dc844985a8978bac1cdb114ce54a1ad3524fe..eeeec18c420a63ab69a4edd36755595d52a31c87 100644 (file)
--- a/arch/mips/sni/a20r.c
+++ b/arch/mips/sni/a20r.c
@@ -143,7 +143,10 @@ static struct platform_device sc26xx_pdev = {
        },
 };
 
-static u32 a20r_ack_hwint(void)
+/*
+ * Trigger chipset to update CPU's CAUSE IP field
+ */
+static u32 a20r_update_cause_ip(void)
 {
        u32 status = read_c0_status();
 
@@ -205,12 +208,14 @@ static void a20r_hwint(void)
        int irq;
 
        clear_c0_status(IE_IRQ0);
-       status = a20r_ack_hwint();
+       status = a20r_update_cause_ip();
        cause = read_c0_cause();
 
        irq = ffs(((cause & status) >> 8) & 0xf8);
        if (likely(irq > 0))
                do_IRQ(SNI_A20R_IRQ_BASE + irq - 1);
+
+       a20r_update_cause_ip();
        set_c0_status(IE_IRQ0);
 }