drm/amd/display: Change some variable name of psr

Panel Replay feature may also use the same variable with PSR.
Change the variable name and make it not specify for PSR.

Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit c7fafb7a46b38a11a19342d153f505749bf56f3e)
Cc: stable@vger.kernel.org # 6.11+

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 07e9ce99694fabf276f258755778a4f5a000d2fc..f2bcc5d32a772c6f59485465485643c0886c2af1 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -6762,7 +6762,7 @@ create_stream_for_sink(struct drm_connector *connector,
                if (stream->out_transfer_func.tf == TRANSFER_FUNCTION_GAMMA22)
                        tf = TRANSFER_FUNC_GAMMA_22;
                mod_build_vsc_infopacket(stream, &stream->vsc_infopacket, stream->output_color_space, tf);
-               aconnector->psr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;
+               aconnector->sr_skip_count = AMDGPU_DM_PSR_ENTRY_DELAY;
 
        }
 finish:
@@ -9028,7 +9028,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                         * during the PSR-SU was disabled.
                         */
                        if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 &&
-                           acrtc_attach->dm_irq_params.allow_psr_entry &&
+                           acrtc_attach->dm_irq_params.allow_sr_entry &&
 #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
                            !amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) &&
 #endif
@@ -9263,27 +9263,27 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                        }
                }
 
-               /* Decrement skip count when PSR is enabled and we're doing fast updates. */
+               /* Decrement skip count when SR is enabled and we're doing fast updates. */
                if (acrtc_state->update_type == UPDATE_TYPE_FAST &&
                    acrtc_state->stream->link->psr_settings.psr_feature_enabled) {
                        struct amdgpu_dm_connector *aconn =
                                (struct amdgpu_dm_connector *)acrtc_state->stream->dm_stream_context;
 
-                       if (aconn->psr_skip_count > 0)
-                               aconn->psr_skip_count--;
+                       if (aconn->sr_skip_count > 0)
+                               aconn->sr_skip_count--;
 
-                       /* Allow PSR when skip count is 0. */
-                       acrtc_attach->dm_irq_params.allow_psr_entry = !aconn->psr_skip_count;
+                       /* Allow SR when skip count is 0. */
+                       acrtc_attach->dm_irq_params.allow_sr_entry = !aconn->sr_skip_count;
 
                        /*
-                        * If sink supports PSR SU, there is no need to rely on
-                        * a vblank event disable request to enable PSR. PSR SU
+                        * If sink supports PSR SU/Panel Replay, there is no need to rely on
+                        * a vblank event disable request to enable PSR/RP. PSR SU/RP
                         * can be enabled immediately once OS demonstrates an
                         * adequate number of fast atomic commits to notify KMD
                         * of update events. See `vblank_control_worker()`.
                         */
                        if (acrtc_state->stream->link->psr_settings.psr_version >= DC_PSR_VERSION_SU_1 &&
-                           acrtc_attach->dm_irq_params.allow_psr_entry &&
+                           acrtc_attach->dm_irq_params.allow_sr_entry &&
 #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY
                            !amdgpu_dm_crc_window_is_activated(acrtc_state->base.crtc) &&
 #endif
@@ -9294,7 +9294,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                            500000000)
                                amdgpu_dm_psr_enable(acrtc_state->stream);
                } else {
-                       acrtc_attach->dm_irq_params.allow_psr_entry = false;
+                       acrtc_attach->dm_irq_params.allow_sr_entry = false;
                }
 
                mutex_unlock(&dm->dc_lock);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index 15d4690c74d60b1453db4d5ddc28de07bd3b0c89..90dfffec33cf49e4cad770e786f37859617050cf 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -727,7 +727,7 @@ struct amdgpu_dm_connector {
        /* Cached display modes */
        struct drm_display_mode freesync_vid_base;
 
-       int psr_skip_count;
+       int sr_skip_count;
        bool disallow_edp_enter_psr;
 
        /* Record progress status of mst*/

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
index a2cf2c066a76ddadde799781da5b17529a14738c..f53165d217ccb5b384093fdfa02ce4d9d24ec132 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
@@ -269,7 +269,7 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work)
        if (vblank_work->stream && vblank_work->stream->link) {
                amdgpu_dm_crtc_set_panel_sr_feature(
                        vblank_work, vblank_work->enable,
-                       vblank_work->acrtc->dm_irq_params.allow_psr_entry ||
+                       vblank_work->acrtc->dm_irq_params.allow_sr_entry ||
                        vblank_work->stream->link->replay_settings.replay_feature_enabled);
        }
 

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h
index 5c9303241aeb99e5f1cfc4d2497d9a8e5318a146..6a7ecc1e4602e716eb8c6e6ceb78bc06ffd255d0 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq_params.h
@@ -33,7 +33,7 @@ struct dm_irq_params {
        struct mod_vrr_params vrr_params;
        struct dc_stream_state *stream;
        int active_planes;
-       bool allow_psr_entry;
+       bool allow_sr_entry;
        struct mod_freesync_config freesync_config;
 
 #ifdef CONFIG_DEBUG_FS