spi: rockchip: Support cs-gpio

1.Add standard cs-gpio support
2.Refer to spi-controller.yaml for details

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210621104848.19539-1-jon.lin@rock-chips.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-rockchip.c b/drivers/spi/spi-rockchip.c
index 950d3bce443bfe348755ec4b5e9214bde3eb13cb..fbd750b1d28e231b47d1170b34dee7ba4f24ed3c 100644 (file)
--- a/drivers/spi/spi-rockchip.c
+++ b/drivers/spi/spi-rockchip.c
@@ -157,7 +157,8 @@
  */
 #define ROCKCHIP_SPI_MAX_TRANLEN               0xffff
 
-#define ROCKCHIP_SPI_MAX_CS_NUM                        2
+/* 2 for native cs, 2 for cs-gpio */
+#define ROCKCHIP_SPI_MAX_CS_NUM                        4
 #define ROCKCHIP_SPI_VER2_TYPE1                        0x05EC0002
 #define ROCKCHIP_SPI_VER2_TYPE2                        0x00110002
 
@@ -245,11 +246,15 @@ static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
                /* Keep things powered as long as CS is asserted */
                pm_runtime_get_sync(rs->dev);
 
-               ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER,
-                                     BIT(spi->chip_select));
+               if (spi->cs_gpiod)
+                       ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1);
+               else
+                       ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi->chip_select));
        } else {
-               ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER,
-                                     BIT(spi->chip_select));
+               if (spi->cs_gpiod)
+                       ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, 1);
+               else
+                       ROCKCHIP_SPI_CLR_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi->chip_select));
 
                /* Drop reference from when we first asserted CS */
                pm_runtime_put(rs->dev);