drm/amd/pm: update check condition for SMU mode1 reset

The fed status does indicate RAS fatal error.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index 04533f99f1e3323aaedd463c5c829373ecd0c5de..2c35eb31475ab80eac6fc1e99f85ce26eda32c81 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -1876,7 +1876,7 @@ static int aldebaran_mode1_reset(struct smu_context *smu)
                /* fatal error triggered by ras, PMFW supports the flag
                   from 68.44.0 */
                if ((smu->smc_fw_version >= 0x00442c00) &&
-                   amdgpu_ras_in_recovery(adev))
+                   amdgpu_ras_get_fed_status(adev))
                        fatal_err = 1;
 
                param |= (fatal_err << 16);

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index ce9b77074cb11bfe50e55705a6cd179cc2c3b022..a887ab945dfa2f5e28fcdfcdc9bee9ae7a134d70 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -2788,7 +2788,7 @@ static void smu_v13_0_0_set_mode1_reset_param(struct smu_context *smu,
        struct amdgpu_device *adev = smu->adev;
 
        if ((smu->smc_fw_version >= supported_version) &&
-           amdgpu_ras_in_recovery(adev))
+           amdgpu_ras_get_fed_status(adev))
                /* Set RAS fatal error reset flag */
                *param = 1 << 16;
        else

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 6790095a2fa77f5a23cbb26c502f65a3d00ece86..78c3f94bb3ff60f48234121f89d1b7431a3d0407 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -2581,7 +2581,7 @@ static int smu_v13_0_6_mode1_reset(struct smu_context *smu)
        param = SMU_RESET_MODE_1;
 
        /* fatal error triggered by ras, PMFW supports the flag */
-       if (amdgpu_ras_in_recovery(adev))
+       if (amdgpu_ras_get_fed_status(adev))
                fatal_err = 1;
 
        param |= (fatal_err << 16);