drm/amd/powerplay: optimize amdgpu_dpm_set_clockgating_by_smu() implementation

Cover the implementation details from outside(of power part).

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
index 240c440cbe00853824cddd19c107b53132aeca89..5e9baca556a46bfec967ccbb1f57091ded56a03d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
@@ -1232,3 +1232,18 @@ int amdgpu_dpm_enable_mgpu_fan_boost(struct amdgpu_device *adev)
 
        return ret;
 }
+
+int amdgpu_dpm_set_clockgating_by_smu(struct amdgpu_device *adev,
+                                     uint32_t msg_id)
+{
+       void *pp_handle = adev->powerplay.pp_handle;
+       const struct amd_pm_funcs *pp_funcs =
+                       adev->powerplay.pp_funcs;
+       int ret = 0;
+
+       if (pp_funcs && pp_funcs->set_clockgating_by_smu)
+               ret = pp_funcs->set_clockgating_by_smu(pp_handle,
+                                                      msg_id);
+
+       return ret;
+}

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
index cc16b5a3ac449c1eb70c7cd24a6f902ef8ad9aa5..672b73ad08c232189225b401fe140c3de6d2c531 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
@@ -341,10 +341,6 @@ enum amdgpu_pcie_gen {
                ((adev)->powerplay.pp_funcs->reset_power_profile_state(\
                        (adev)->powerplay.pp_handle, request))
 
-#define amdgpu_dpm_set_clockgating_by_smu(adev, msg_id) \
-               ((adev)->powerplay.pp_funcs->set_clockgating_by_smu(\
-                       (adev)->powerplay.pp_handle, msg_id))
-
 #define amdgpu_dpm_get_power_profile_mode(adev, buf) \
                ((adev)->powerplay.pp_funcs->get_power_profile_mode(\
                        (adev)->powerplay.pp_handle, buf))
@@ -546,4 +542,7 @@ int amdgpu_dpm_allow_xgmi_power_down(struct amdgpu_device *adev, bool en);
 
 int amdgpu_dpm_enable_mgpu_fan_boost(struct amdgpu_device *adev);
 
+int amdgpu_dpm_set_clockgating_by_smu(struct amdgpu_device *adev,
+                                     uint32_t msg_id);
+
 #endif

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 14fd04b699da5533c2d84fe9919be3360fe7548d..003982f8eb7fb84151136fb6e2e421508de14e7b 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -5880,8 +5880,7 @@ static int gfx_v8_0_tonga_update_gfx_clock_gating(struct amdgpu_device *adev,
                                PP_BLOCK_GFX_CG,
                                pp_support_state,
                                pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & (AMD_CG_SUPPORT_GFX_MGCG | AMD_CG_SUPPORT_GFX_MGLS)) {
@@ -5902,8 +5901,7 @@ static int gfx_v8_0_tonga_update_gfx_clock_gating(struct amdgpu_device *adev,
                                PP_BLOCK_GFX_MG,
                                pp_support_state,
                                pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        return 0;
@@ -5932,8 +5930,7 @@ static int gfx_v8_0_polaris_update_gfx_clock_gating(struct amdgpu_device *adev,
                                PP_BLOCK_GFX_CG,
                                pp_support_state,
                                pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & (AMD_CG_SUPPORT_GFX_3D_CGCG | AMD_CG_SUPPORT_GFX_3D_CGLS)) {
@@ -5952,8 +5949,7 @@ static int gfx_v8_0_polaris_update_gfx_clock_gating(struct amdgpu_device *adev,
                                PP_BLOCK_GFX_3D,
                                pp_support_state,
                                pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & (AMD_CG_SUPPORT_GFX_MGCG | AMD_CG_SUPPORT_GFX_MGLS)) {
@@ -5974,8 +5970,7 @@ static int gfx_v8_0_polaris_update_gfx_clock_gating(struct amdgpu_device *adev,
                                PP_BLOCK_GFX_MG,
                                pp_support_state,
                                pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & AMD_CG_SUPPORT_GFX_RLC_LS) {
@@ -5990,8 +5985,7 @@ static int gfx_v8_0_polaris_update_gfx_clock_gating(struct amdgpu_device *adev,
                                PP_BLOCK_GFX_RLC,
                                pp_support_state,
                                pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & AMD_CG_SUPPORT_GFX_CP_LS) {
@@ -6005,8 +5999,7 @@ static int gfx_v8_0_polaris_update_gfx_clock_gating(struct amdgpu_device *adev,
                        PP_BLOCK_GFX_CP,
                        pp_support_state,
                        pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        return 0;

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index f6f2ed0830b1ad6e0822c1be981372a3a3244d4a..b4e4a7a19d19e459aa6705920e6af544796c2f72 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1507,8 +1507,7 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_MC,
                               pp_support_state,
                               pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & (AMD_CG_SUPPORT_SDMA_LS | AMD_CG_SUPPORT_SDMA_MGCG)) {
@@ -1526,8 +1525,7 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_SDMA,
                               pp_support_state,
                               pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & (AMD_CG_SUPPORT_HDP_LS | AMD_CG_SUPPORT_HDP_MGCG)) {
@@ -1545,8 +1543,7 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_HDP,
                               pp_support_state,
                               pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
 
@@ -1560,8 +1557,7 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_BIF,
                               PP_STATE_SUPPORT_LS,
                                pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
        if (adev->cg_flags & AMD_CG_SUPPORT_BIF_MGCG) {
                if (state == AMD_CG_STATE_UNGATE)
@@ -1573,8 +1569,7 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_BIF,
                               PP_STATE_SUPPORT_CG,
                               pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & AMD_CG_SUPPORT_DRM_LS) {
@@ -1588,8 +1583,7 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_DRM,
                               PP_STATE_SUPPORT_LS,
                               pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
 
        if (adev->cg_flags & AMD_CG_SUPPORT_ROM_MGCG) {
@@ -1603,8 +1597,7 @@ static int vi_common_set_clockgating_state_by_smu(void *handle,
                               PP_BLOCK_SYS_ROM,
                               PP_STATE_SUPPORT_CG,
                               pp_state);
-               if (adev->powerplay.pp_funcs->set_clockgating_by_smu)
-                       amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
+               amdgpu_dpm_set_clockgating_by_smu(adev, msg_id);
        }
        return 0;
 }