struct kvm_mmu_memory_cache *memcache = &vcpu->arch.mmu_page_cache;
        struct vm_area_struct *vma;
        pfn_t pfn;
+       pgprot_t mem_type = PAGE_S2;
 
        write_fault = kvm_is_write_fault(kvm_vcpu_get_hsr(vcpu));
        if (fault_status == FSC_PERM && !write_fault) {
        if (is_error_pfn(pfn))
                return -EFAULT;
 
+       if (kvm_is_mmio_pfn(pfn))
+               mem_type = PAGE_S2_DEVICE;
+
        spin_lock(&kvm->mmu_lock);
        if (mmu_notifier_retry(kvm, mmu_seq))
                goto out_unlock;
                hugetlb = transparent_hugepage_adjust(&pfn, &fault_ipa);
 
        if (hugetlb) {
-               pmd_t new_pmd = pfn_pmd(pfn, PAGE_S2);
+               pmd_t new_pmd = pfn_pmd(pfn, mem_type);
                new_pmd = pmd_mkhuge(new_pmd);
                if (writable) {
                        kvm_set_s2pmd_writable(&new_pmd);
                coherent_cache_guest_page(vcpu, hva & PMD_MASK, PMD_SIZE);
                ret = stage2_set_pmd_huge(kvm, memcache, fault_ipa, &new_pmd);
        } else {
-               pte_t new_pte = pfn_pte(pfn, PAGE_S2);
+               pte_t new_pte = pfn_pte(pfn, mem_type);
                if (writable) {
                        kvm_set_s2pte_writable(&new_pte);
                        kvm_set_pfn_dirty(pfn);
                }
                coherent_cache_guest_page(vcpu, hva, PAGE_SIZE);
-               ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte, false);
+               ret = stage2_set_pte(kvm, memcache, fault_ipa, &new_pte,
+                                    mem_type == PAGE_S2_DEVICE);
        }