}
 }
 
+/*
+ * On common bits:
+ * DP_PSR_RFB_STORAGE_ERROR == DP_PANEL_REPLAY_RFB_STORAGE_ERROR
+ * DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR == DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR
+ * DP_PSR_LINK_CRC_ERROR == DP_PANEL_REPLAY_LINK_CRC_ERROR
+ * this function is relying on PSR definitions
+ */
 void intel_psr_short_pulse(struct intel_dp *intel_dp)
 {
        struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
                          DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
                          DP_PSR_LINK_CRC_ERROR;
 
-       if (!CAN_PSR(intel_dp))
+       if (!CAN_PSR(intel_dp) && !CAN_PANEL_REPLAY(intel_dp))
                return;
 
        mutex_lock(&psr->lock);
                goto exit;
        }
 
-       if (status == DP_PSR_SINK_INTERNAL_ERROR || (error_status & errors)) {
+       if ((!psr->panel_replay_enabled && status == DP_PSR_SINK_INTERNAL_ERROR) ||
+           (error_status & errors)) {
                intel_psr_disable_locked(intel_dp);
                psr->sink_not_reliable = true;
        }
 
-       if (status == DP_PSR_SINK_INTERNAL_ERROR && !error_status)
+       if (!psr->panel_replay_enabled && status == DP_PSR_SINK_INTERNAL_ERROR &&
+           !error_status)
                drm_dbg_kms(&dev_priv->drm,
                            "PSR sink internal error, disabling PSR\n");
        if (error_status & DP_PSR_RFB_STORAGE_ERROR)
        /* clear status register */
        drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_ERROR_STATUS, error_status);
 
-       psr_alpm_check(intel_dp);
-       psr_capability_changed_check(intel_dp);
+       if (!psr->panel_replay_enabled) {
+               psr_alpm_check(intel_dp);
+               psr_capability_changed_check(intel_dp);
+       }
 
 exit:
        mutex_unlock(&psr->lock);