drm/msm/hdmi: set hdp clock rate before prepare_enable

The clock driver usually complains when a clock is being prepared
before setting its rate. It is the case here for "core_clk" which
needs to be set at 19.2 MHz before we attempt a prepare_enable().

Signed-off-by: Stephane Viau <sviau@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c
index ae750f6928c1e559a9d6f16f5964fa37f559ce61..7f7aadef8a8258101a63e57a14ed09b7ecc09893 100644 (file)
--- a/drivers/gpu/drm/msm/hdmi/hdmi.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.c
@@ -277,6 +277,7 @@ static int hdmi_bind(struct device *dev, struct device *master, void *data)
        static const char *hpd_reg_names[] = {"hpd-gdsc", "hpd-5v"};
        static const char *pwr_reg_names[] = {"core-vdda", "core-vcc"};
        static const char *hpd_clk_names[] = {"iface_clk", "core_clk", "mdp_core_clk"};
+       static unsigned long hpd_clk_freq[] = {0, 19200000, 0};
        static const char *pwr_clk_names[] = {"extp_clk", "alt_iface_clk"};
 
        config.phy_init      = hdmi_phy_8x74_init;
@@ -286,6 +287,7 @@ static int hdmi_bind(struct device *dev, struct device *master, void *data)
        config.pwr_reg_names = pwr_reg_names;
        config.pwr_reg_cnt   = ARRAY_SIZE(pwr_reg_names);
        config.hpd_clk_names = hpd_clk_names;
+       config.hpd_freq      = hpd_clk_freq;
        config.hpd_clk_cnt   = ARRAY_SIZE(hpd_clk_names);
        config.pwr_clk_names = pwr_clk_names;
        config.pwr_clk_cnt   = ARRAY_SIZE(pwr_clk_names);

diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h
index 9fafee6a3e43c357541161089387826d55e68018..9d7723c6528a646eef133d490ba1b21d82e8a696 100644 (file)
--- a/drivers/gpu/drm/msm/hdmi/hdmi.h
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.h
@@ -87,6 +87,7 @@ struct hdmi_platform_config {
 
        /* clks that need to be on for hpd: */
        const char **hpd_clk_names;
+       const long unsigned *hpd_freq;
        int hpd_clk_cnt;
 
        /* clks that need to be on for screen pwr (ie pixel clk): */

diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_connector.c b/drivers/gpu/drm/msm/hdmi/hdmi_connector.c
index e56a6196867c6609c4940555d359cd898a4155bd..28f7e3ec6c28939d918a86ee1bdbc2fa60c0d010 100644 (file)
--- a/drivers/gpu/drm/msm/hdmi/hdmi_connector.c
+++ b/drivers/gpu/drm/msm/hdmi/hdmi_connector.c
@@ -127,6 +127,14 @@ static int hpd_enable(struct hdmi_connector *hdmi_connector)
        }
 
        for (i = 0; i < config->hpd_clk_cnt; i++) {
+               if (config->hpd_freq && config->hpd_freq[i]) {
+                       ret = clk_set_rate(hdmi->hpd_clks[i],
+                                       config->hpd_freq[i]);
+                       if (ret)
+                               dev_warn(dev->dev, "failed to set clk %s (%d)\n",
+                                               config->hpd_clk_names[i], ret);
+               }
+
                ret = clk_prepare_enable(hdmi->hpd_clks[i]);
                if (ret) {
                        dev_err(dev->dev, "failed to enable hpd clk: %s (%d)\n",