static void armada_xp_mpic_smp_cpu_init(void)
 {
+       u32 control;
+       int nr_irqs, i;
+
+       control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL);
+       nr_irqs = (control >> 2) & 0x3ff;
+
+       for (i = 0; i < nr_irqs; i++)
+               writel(i, per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS);
+
        /* Clear pending IPIs */
        writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS);
 
                                             struct device_node *parent)
 {
        struct resource main_int_res, per_cpu_int_res;
-       int parent_irq;
+       int parent_irq, nr_irqs, i;
        u32 control;
 
        BUG_ON(of_address_to_resource(node, 0, &main_int_res));
        BUG_ON(!per_cpu_int_base);
 
        control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL);
+       nr_irqs = (control >> 2) & 0x3ff;
+
+       for (i = 0; i < nr_irqs; i++)
+               writel(i, main_int_base + ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS);
 
        armada_370_xp_mpic_domain =
-               irq_domain_add_linear(node, (control >> 2) & 0x3ff,
+               irq_domain_add_linear(node, nr_irqs,
                                &armada_370_xp_mpic_irq_ops, NULL);
 
        BUG_ON(!armada_370_xp_mpic_domain);