]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
qed: Don't close the OUT_EN during init
authorMintz, Yuval <Yuval.Mintz@cavium.com>
Thu, 6 Apr 2017 12:58:31 +0000 (15:58 +0300)
committerChuck Anderson <chuck.anderson@oracle.com>
Wed, 26 Jul 2017 03:46:57 +0000 (20:46 -0700)
Orabug: 2593305326439680

Before initializing the chip's engine, driver currently closes a set
of registers on the HW's ingress flow to prevent packets from slipping
in while they're not supposed to.

This configuration is insufficient, as there are some scenarios where
packets would still arrive even when said registers are set,
but the management firmware already closes other per-port registers
that do suffice, making this setting unnecessray.

Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Brian Maly <brian.maly@oracle.com>
drivers/net/ethernet/qlogic/qed/qed_dev.c

index c79c2e2446d9a0a20d9b7f24239b06a0ca52db48..e6757439d77af5c530fcedd941d7855fe86a1806 100644 (file)
@@ -1254,18 +1254,6 @@ static int qed_hw_init_common(struct qed_hwfn *p_hwfn,
 
        qed_cxt_hw_init_common(p_hwfn);
 
-       /* Close gate from NIG to BRB/Storm; By default they are open, but
-        * we close them to prevent NIG from passing data to reset blocks.
-        * Should have been done in the ENGINE phase, but init-tool lacks
-        * proper port-pretend capabilities.
-        */
-       qed_wr(p_hwfn, p_ptt, NIG_REG_RX_BRB_OUT_EN, 0);
-       qed_wr(p_hwfn, p_ptt, NIG_REG_STORM_OUT_EN, 0);
-       qed_port_pretend(p_hwfn, p_ptt, p_hwfn->port_id ^ 1);
-       qed_wr(p_hwfn, p_ptt, NIG_REG_RX_BRB_OUT_EN, 0);
-       qed_wr(p_hwfn, p_ptt, NIG_REG_STORM_OUT_EN, 0);
-       qed_port_unpretend(p_hwfn, p_ptt);
-
        qed_init_cache_line_size(p_hwfn, p_ptt);
 
        rc = qed_init_run(p_hwfn, p_ptt, PHASE_ENGINE, ANY_PHASE_ID, hw_mode);