reg = <0xb0000000 0x10000>;
        };
 
+Hisilicon HiP05 PERISUB system controller
+
+Required properties:
+- compatible : "hisilicon,hip05-perisubc", "syscon";
+- reg : Register address and size
+
+The HiP05 PERISUB system controller is shared by peripheral controllers in
+HiP05 Soc to implement some basic configurations. The peripheral
+controllers include mdio, ddr, iic, uart, timer and so on.
+
+Example:
+       /* for HiP05 perisub-ctrl-c system */
+       peri_c_subctrl: syscon@80000000 {
+               compatible = "hisilicon,hip05-perisubc", "syscon";
+               reg = <0x0 0x80000000 0x0 0x10000>;
+       };
 -----------------------------------------------------------------------
 Hisilicon CPU controller
 
 
                        clock-frequency = <200000000>;
                };
 
+               peri_c_subctrl: syscon@80000000 {
+                       compatible = "hisilicon,hip05-perisubc", "syscon";
+                       reg = < 0x0 0x80000000 0x0 0x10000>;
+               };
+
                uart0: uart@80300000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x0 0x80300000 0x0 0x10000>;
 
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "hisilicon,hns-mdio";
-               reg = <0x0 0x803c0000 0x0 0x10000
-                      0x0 0x80000000 0x0 0x10000>;
+               reg = <0x0 0x803c0000 0x0 0x10000>;
+               subctrl-vbase = <&peri_c_subctrl>;
 
                soc0_phy0: ethernet-phy@0 {
                        reg = <0x0>;