struct skl_wm_values {
        unsigned dirty_pipes;
        struct skl_ddb_allocation ddb;
-       uint32_t wm_linetime[I915_MAX_PIPES];
        uint32_t plane[I915_MAX_PIPES][I915_MAX_PLANES][8];
        uint32_t plane_trans[I915_MAX_PIPES][I915_MAX_PLANES];
 };
 
        struct drm_device *dev = crtc->dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+       struct intel_crtc_state *intel_cstate =
+               to_intel_crtc_state(crtc->state);
        struct intel_crtc_state *old_intel_state =
                to_intel_crtc_state(old_crtc_state);
        bool modeset = needs_modeset(crtc->state);
                intel_color_load_luts(crtc->state);
        }
 
-       if (to_intel_crtc_state(crtc->state)->update_pipe)
+       if (intel_cstate->update_pipe) {
                intel_update_pipe_config(intel_crtc, old_intel_state);
-       else if (INTEL_GEN(dev_priv) >= 9) {
+       } else if (INTEL_GEN(dev_priv) >= 9) {
                skl_detach_scalers(intel_crtc);
 
                I915_WRITE(PIPE_WM_LINETIME(pipe),
-                          dev_priv->wm.skl_hw.wm_linetime[pipe]);
+                          intel_cstate->wm.skl.optimal.linetime);
        }
 }
 
 
                temp |= PLANE_WM_EN;
 
        r->plane_trans[pipe][PLANE_CURSOR] = temp;
-
-       r->wm_linetime[pipe] = p_wm->linetime;
 }
 
 static void skl_ddb_entry_write(struct drm_i915_private *dev_priv,
                     struct skl_wm_values *src,
                     enum pipe pipe)
 {
-       dst->wm_linetime[pipe] = src->wm_linetime[pipe];
        memcpy(dst->plane[pipe], src->plane[pipe],
               sizeof(dst->plane[pipe]));
        memcpy(dst->plane_trans[pipe], src->plane_trans[pipe],
 
        max_level = ilk_wm_max_level(dev_priv);
 
-       hw->wm_linetime[pipe] = I915_READ(PIPE_WM_LINETIME(pipe));
-
        for (level = 0; level <= max_level; level++) {
                for (i = 0; i < intel_num_planes(intel_crtc); i++)
                        hw->plane[pipe][i][level] =
 
        hw->dirty_pipes |= drm_crtc_mask(crtc);
 
-       active->linetime = hw->wm_linetime[pipe];
+       active->linetime = I915_READ(PIPE_WM_LINETIME(pipe));
 
        for (level = 0; level <= max_level; level++) {
                for (i = 0; i < intel_num_planes(intel_crtc); i++) {