arm64: dts: imx95: add USB2.0 nodes

Add USB2.0 controller and phy nodes.

Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> # TQMa95xxSA
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Xu Yang <xu.yang_2@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
index 9bb26b466a061a1dd66087b212cef424f37a1987..8dd859d8d31951c15e5510900c2f2289e444af32 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx95.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
@@ -470,6 +470,13 @@
                };
        };
 
+       usbphynop: usbphynop {
+               compatible = "usb-nop-xceiv";
+               clocks = <&scmi_clk IMX95_CLK_HSIO>;
+               clock-names = "main_clk";
+               #phy-cells = <0>;
+       };
+
        soc {
                compatible = "simple-bus";
                #address-cells = <2>;
@@ -1621,6 +1628,29 @@
                        status = "disabled";
                };
 
+               usb2: usb@4c200000 {
+                       compatible = "fsl,imx95-usb", "fsl,imx7d-usb", "fsl,imx27-usb";
+                       reg = <0x0 0x4c200000 0x0 0x200>;
+                       interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&scmi_clk IMX95_CLK_HSIO>,
+                                <&scmi_clk IMX95_CLK_32K>;
+                       clock-names = "usb_ctrl_root", "usb_wakeup";
+                       iommus = <&smmu 0xf>;
+                       phys = <&usbphynop>;
+                       power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
+                       fsl,usbmisc = <&usbmisc 0>;
+                       status = "disabled";
+               };
+
+               usbmisc: usbmisc@4c200200 {
+                       compatible = "fsl,imx95-usbmisc", "fsl,imx7d-usbmisc",
+                                    "fsl,imx6q-usbmisc";
+                       reg = <0x0 0x4c200200 0x0 0x200>,
+                             <0x0 0x4c010014 0x0 0x04>;
+                       #index-cells = <1>;
+               };
+
                pcie0: pcie@4c300000 {
                        compatible = "fsl,imx95-pcie";
                        reg = <0 0x4c300000 0 0x10000>,