drm/i915: disable turbo on ValleyView for now

We'll probably need new init functions and will need to test it.

v2: fix impossible GEN6 && GEN7 condition, move to Daniel's new init function

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index aee389c442a4e7433a96254389a8f57a9dd1c5f8..58f4b02151f200f9cc96b70a81dad79a66f98d95 100644 (file)
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9541,7 +9541,7 @@ void intel_modeset_init_hw(struct drm_device *dev)
                intel_init_emon(dev);
        }
 
-       if (IS_GEN6(dev) || IS_GEN7(dev)) {
+       if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
                gen6_enable_rps(dev_priv);
                gen6_update_ring_freq(dev_priv);
        }
@@ -9632,7 +9632,7 @@ void intel_modeset_cleanup(struct drm_device *dev)
 
        if (IS_IRONLAKE_M(dev))
                ironlake_disable_drps(dev);
-       if (IS_GEN6(dev) || IS_GEN7(dev))
+       if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev))
                gen6_disable_rps(dev);
 
        if (IS_IRONLAKE_M(dev))