if (PwrState) {
                usb_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON);
 
-               /*  1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid */
+               /*  1.2V Power: From VDDON with Power Cut(0x0000h[15]), default valid */
                tmpV16 = usb_read16(pAdapter, REG_SYS_ISO_CTRL);
                if (!(tmpV16 & PWC_EV12V)) {
                        tmpV16 |= PWC_EV12V;
 
 }
 
 /*
- * _rtw_join_timeout_handler - Timeout/faliure handler for CMD JoinBss
+ * _rtw_join_timeout_handler - Timeout/failure handler for CMD JoinBss
  * @adapter: pointer to struct adapter structure
  */
 void _rtw_join_timeout_handler (unsigned long data)
 
 
                dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
                /*  (1)Hardware does not provide RSSI for CCK */
-               /*  (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
+               /*  (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
 
                cck_highpwr = dm_odm->bCckHighPower;
 
                        pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
                        dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
                }
-               /*  (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
+               /*  (2)PWDB, Average PWDB calculated by hardware (for rate adaptive) */
                rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
 
                PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
 
 
 /*  ODM_CMNINFO_WM_MODE */
 enum odm_wireless_mode {
-       ODM_WM_UNKNOW   = 0x0,
+       ODM_WM_UNKNOWN  = 0x0,
        ODM_WM_B        = BIT(0),
        ODM_WM_G        = BIT(1),
        ODM_WM_A        = BIT(2),
 
 #ifndef __RTL8188E_SPEC_H__
 #define __RTL8188E_SPEC_H__
 
-/*        8192C Regsiter offset definition */
+/*        8192C Register offset definition */
 
 #define                HAL_PS_TIMER_INT_DELAY  50      /*   50 microseconds */
 #define                HAL_92C_NAV_UPPER_UNIT  128     /*  micro-second */
 
 #define REG_USB_HRPWM                  0xFE58
 #define REG_USB_HCPWM                  0xFE57
-/*        8192C Regsiter Bit and Content definition */
+/*        8192C Register Bit and Content definition */
 /*     0x0000h ~ 0x00FFh       System Configuration */
 
 /* 2 SYS_ISO_CTRL */