hw_atl_tps_tx_pkt_shed_desc_tc_arb_mode_set(self, 0U);
        hw_atl_tps_tx_pkt_shed_data_arb_mode_set(self, 0U);
 
-       hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(self, 0xFFF, 0U);
-       hw_atl_tps_tx_pkt_shed_tc_data_weight_set(self, 0x64, 0U);
-       hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, 0x50, 0U);
-       hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, 0x1E, 0U);
+       hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(self, 0U, 0xFFF);
+       hw_atl_tps_tx_pkt_shed_tc_data_weight_set(self, 0U, 0x64);
+       hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, 0U, 0x50);
+       hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, 0U, 0x1E);
 
        /* Tx buf size */
        buff_size = HW_ATL_A0_TXBUF_MAX;
 
                u32 threshold = 0U;
 
                /* TX Packet Scheduler Data TC0 */
-               hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(self, 0xFFF, tc);
-               hw_atl_tps_tx_pkt_shed_tc_data_weight_set(self, 0x64, tc);
+               hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(self, tc, 0xFFF);
+               hw_atl_tps_tx_pkt_shed_tc_data_weight_set(self, tc, 0x64);
 
                /* Tx buf size TC0 */
                hw_atl_tpb_tx_pkt_buff_size_per_tc_set(self, tx_buff_size, tc);
                const u32 en = (nic_cfg->tc_max_rate[tc] != 0) ? 1U : 0U;
                const u32 desc = AQ_NIC_CFG_TCVEC2RING(nic_cfg, tc, 0);
 
-               hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, 0x50, tc);
-               hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, 0x1E, tc);
+               hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(self, tc, 0x50);
+               hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(self, tc, 0x1E);
 
                hw_atl_tps_tx_desc_rate_en_set(self, desc, en);
 
 
 }
 
 void hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(struct aq_hw_s *aq_hw,
-                                                  u32 max_credit,
-                                                  u32 tc)
+                                                  const u32 tc,
+                                                  const u32 max_credit)
 {
        aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_TCTCREDIT_MAX_ADR(tc),
                            HW_ATL_TPS_DESC_TCTCREDIT_MAX_MSK,
 }
 
 void hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(struct aq_hw_s *aq_hw,
-                                              u32 tx_pkt_shed_desc_tc_weight,
-                                              u32 tc)
+                                              const u32 tc,
+                                              const u32 weight)
 {
        aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DESC_TCTWEIGHT_ADR(tc),
                            HW_ATL_TPS_DESC_TCTWEIGHT_MSK,
                            HW_ATL_TPS_DESC_TCTWEIGHT_SHIFT,
-                           tx_pkt_shed_desc_tc_weight);
+                           weight);
 }
 
 void hw_atl_tps_tx_pkt_shed_desc_vm_arb_mode_set(struct aq_hw_s *aq_hw,
 }
 
 void hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw_s *aq_hw,
-                                                  u32 max_credit,
-                                                  u32 tc)
+                                                  const u32 tc,
+                                                  const u32 max_credit)
 {
        aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DATA_TCTCREDIT_MAX_ADR(tc),
                            HW_ATL_TPS_DATA_TCTCREDIT_MAX_MSK,
 }
 
 void hw_atl_tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw_s *aq_hw,
-                                              u32 tx_pkt_shed_tc_data_weight,
-                                              u32 tc)
+                                              const u32 tc,
+                                              const u32 weight)
 {
        aq_hw_write_reg_bit(aq_hw, HW_ATL_TPS_DATA_TCTWEIGHT_ADR(tc),
                            HW_ATL_TPS_DATA_TCTWEIGHT_MSK,
                            HW_ATL_TPS_DATA_TCTWEIGHT_SHIFT,
-                           tx_pkt_shed_tc_data_weight);
+                           weight);
 }
 
 void hw_atl_tps_tx_desc_rate_mode_set(struct aq_hw_s *aq_hw,
 
 
 /* set tx packet scheduler descriptor tc max credit */
 void hw_atl_tps_tx_pkt_shed_desc_tc_max_credit_set(struct aq_hw_s *aq_hw,
-                                                  u32 max_credit,
-                                           u32 tc);
+                                                  const u32 tc,
+                                                  const u32 max_credit);
 
 /* set tx packet scheduler descriptor tc weight */
 void hw_atl_tps_tx_pkt_shed_desc_tc_weight_set(struct aq_hw_s *aq_hw,
-                                              u32 tx_pkt_shed_desc_tc_weight,
-                                       u32 tc);
+                                              const u32 tc,
+                                              const u32 weight);
 
 /* set tx packet scheduler descriptor vm arbitration mode */
 void hw_atl_tps_tx_pkt_shed_desc_vm_arb_mode_set(struct aq_hw_s *aq_hw,
 
 /* set tx packet scheduler tc data max credit */
 void hw_atl_tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw_s *aq_hw,
-                                                  u32 max_credit,
-                                           u32 tc);
+                                                  const u32 tc,
+                                                  const u32 max_credit);
 
 /* set tx packet scheduler tc data weight */
 void hw_atl_tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw_s *aq_hw,
-                                              u32 tx_pkt_shed_tc_data_weight,
-                                       u32 tc);
+                                              const u32 tc,
+                                              const u32 weight);
 
 /* set tx descriptor rate mode */
 void hw_atl_tps_tx_desc_rate_mode_set(struct aq_hw_s *aq_hw,
 
 }
 
 void hw_atl2_tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw_s *aq_hw,
-                                                   u32 max_credit,
-                                                   u32 tc)
+                                                   const u32 tc,
+                                                   const u32 max_credit)
 {
        aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPS_DATA_TCTCREDIT_MAX_ADR(tc),
                            HW_ATL2_TPS_DATA_TCTCREDIT_MAX_MSK,
 }
 
 void hw_atl2_tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw_s *aq_hw,
-                                               u32 tx_pkt_shed_tc_data_weight,
-                                               u32 tc)
+                                               const u32 tc,
+                                               const u32 weight)
 {
        aq_hw_write_reg_bit(aq_hw, HW_ATL2_TPS_DATA_TCTWEIGHT_ADR(tc),
                            HW_ATL2_TPS_DATA_TCTWEIGHT_MSK,
                            HW_ATL2_TPS_DATA_TCTWEIGHT_SHIFT,
-                           tx_pkt_shed_tc_data_weight);
+                           weight);
 }
 
 u32 hw_atl2_get_hw_version(struct aq_hw_s *aq_hw)
 
 
 /* set tx packet scheduler tc data max credit */
 void hw_atl2_tps_tx_pkt_shed_tc_data_max_credit_set(struct aq_hw_s *aq_hw,
-                                                   u32 max_credit,
-                                                   u32 tc);
+                                                   const u32 tc,
+                                                   const u32 max_credit);
 
 /* set tx packet scheduler tc data weight */
 void hw_atl2_tps_tx_pkt_shed_tc_data_weight_set(struct aq_hw_s *aq_hw,
-                                               u32 tx_pkt_shed_tc_data_weight,
-                                               u32 tc);
+                                               const u32 tc,
+                                               const u32 weight);
 
 u32 hw_atl2_get_hw_version(struct aq_hw_s *aq_hw);