For MIPS R2, use the EI and DI instructions to enable and disable
interrupts.
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
        mtc0    \reg, CP0_TCSTATUS
        _ehb
        .endm
+#elif defined(CONFIG_CPU_MIPSR2)
+       .macro  local_irq_enable reg=t0
+       ei
+       irq_enable_hazard
+       .endm
+
+       .macro  local_irq_disable reg=t0
+       di
+       irq_disable_hazard
+       .endm
 #else
        .macro  local_irq_enable reg=t0
        mfc0    \reg, CP0_STATUS