drm/amdgpu/gfx11: enter safe mode before touching CP_INT_CNTL

Need to enter safe mode before touching GC MMIO.

Acked-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 22bb352786917e4d7b0248c0c953b291719a28ce..98261000e0220cde711a98c963552552dbbd4a05 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -4781,6 +4781,8 @@ static int gfx_v11_0_soft_reset(void *handle)
        int r, i, j, k;
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
+       gfx_v11_0_set_safe_mode(adev, 0);
+
        tmp = RREG32_SOC15(GC, 0, regCP_INT_CNTL);
        tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CMP_BUSY_INT_ENABLE, 0);
        tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, CNTX_BUSY_INT_ENABLE, 0);
@@ -4788,8 +4790,6 @@ static int gfx_v11_0_soft_reset(void *handle)
        tmp = REG_SET_FIELD(tmp, CP_INT_CNTL, GFX_IDLE_INT_ENABLE, 0);
        WREG32_SOC15(GC, 0, regCP_INT_CNTL, tmp);
 
-       gfx_v11_0_set_safe_mode(adev, 0);
-
        mutex_lock(&adev->srbm_mutex);
        for (i = 0; i < adev->gfx.mec.num_mec; ++i) {
                for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) {