drm/amd/display: Add DCN315 DM Support

Add display manager support for DCN 3.1.5.

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 493be0c49777d2e5079913a73e519143731093cd..8cfe18b92c994af9015ca9342fb5762256690b7d 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -114,6 +114,8 @@ MODULE_FIRMWARE(FIRMWARE_DIMGREY_CAVEFISH_DMUB);
 MODULE_FIRMWARE(FIRMWARE_BEIGE_GOBY_DMUB);
 #define FIRMWARE_YELLOW_CARP_DMUB "amdgpu/yellow_carp_dmcub.bin"
 MODULE_FIRMWARE(FIRMWARE_YELLOW_CARP_DMUB);
+#define FIRMWARE_DCN_315_DMUB "amdgpu/dcn_3_1_5_dmcub.bin"
+MODULE_FIRMWARE(FIRMWARE_DCN_315_DMUB);
 #define FIRMWARE_DCN316_DMUB "amdgpu/dcn_3_1_6_dmcub.bin"
 MODULE_FIRMWARE(FIRMWARE_DCN316_DMUB);
 
@@ -1465,6 +1467,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
                case IP_VERSION(3, 0, 1):
                case IP_VERSION(3, 1, 2):
                case IP_VERSION(3, 1, 3):
+               case IP_VERSION(3, 1, 5):
                        init_data.flags.gpu_vm_support = true;
                        break;
                case IP_VERSION(2, 0, 3):
@@ -1803,6 +1806,7 @@ static int load_dmcu_fw(struct amdgpu_device *adev)
                case IP_VERSION(3, 0, 1):
                case IP_VERSION(3, 1, 2):
                case IP_VERSION(3, 1, 3):
+               case IP_VERSION(3, 1, 5):
                case IP_VERSION(3, 1, 6):
                        return 0;
                default:
@@ -1919,11 +1923,14 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)
                dmub_asic = (adev->external_rev_id == YELLOW_CARP_B0) ? DMUB_ASIC_DCN31B : DMUB_ASIC_DCN31;
                fw_name_dmub = FIRMWARE_YELLOW_CARP_DMUB;
                break;
+       case IP_VERSION(3, 1, 5):
+               dmub_asic = DMUB_ASIC_DCN315;
+               fw_name_dmub = FIRMWARE_DCN_315_DMUB;
+               break;
        case IP_VERSION(3, 1, 6):
                dmub_asic = DMUB_ASIC_DCN316;
                fw_name_dmub = FIRMWARE_DCN316_DMUB;
                break;
-
        default:
                /* ASIC doesn't support DMUB. */
                return 0;
@@ -4231,6 +4238,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
        case IP_VERSION(3, 0, 0):
        case IP_VERSION(3, 1, 2):
        case IP_VERSION(3, 1, 3):
+       case IP_VERSION(3, 1, 5):
        case IP_VERSION(3, 1, 6):
        case IP_VERSION(2, 1, 0):
                if (register_outbox_irq_handlers(dm->adev)) {
@@ -4248,6 +4256,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
                switch (adev->ip_versions[DCE_HWIP][0]) {
                case IP_VERSION(3, 1, 2):
                case IP_VERSION(3, 1, 3):
+               case IP_VERSION(3, 1, 5):
                case IP_VERSION(3, 1, 6):
                        psr_feature_enabled = true;
                        break;
@@ -4366,6 +4375,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
                case IP_VERSION(3, 0, 1):
                case IP_VERSION(3, 1, 2):
                case IP_VERSION(3, 1, 3):
+               case IP_VERSION(3, 1, 5):
                case IP_VERSION(3, 1, 6):
                        if (dcn10_register_irq_handlers(dm->adev)) {
                                DRM_ERROR("DM: Failed to initialize IRQ\n");
@@ -4552,6 +4562,7 @@ static int dm_early_init(void *handle)
                case IP_VERSION(2, 1, 0):
                case IP_VERSION(3, 1, 2):
                case IP_VERSION(3, 1, 3):
+               case IP_VERSION(3, 1, 5):
                case IP_VERSION(3, 1, 6):
                        adev->mode_info.num_crtc = 4;
                        adev->mode_info.num_hpd = 4;
@@ -5225,6 +5236,7 @@ get_plane_modifiers(const struct amdgpu_device *adev, unsigned int plane_type, u
        case AMDGPU_FAMILY_NV:
        case AMDGPU_FAMILY_VGH:
        case AMDGPU_FAMILY_YC:
+       case AMDGPU_FAMILY_GC_10_3_6:
        case AMDGPU_FAMILY_GC_10_3_7:
                if (adev->ip_versions[GC_HWIP][0] >= IP_VERSION(10, 3, 0))
                        add_gfx10_3_modifiers(adev, mods, &size, &capacity);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
index 8709827b69ad12eecf037a7678d3e347de83a934..bf0d50277f8f32c7cad9f4fbd1693d6556eb4425 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
@@ -664,6 +664,7 @@ struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev, struct
 
                hdcp_work[i].hdcp.config.psp.handle = &adev->psp;
                if (dc->ctx->dce_version == DCN_VERSION_3_1 ||
+                   dc->ctx->dce_version == DCN_VERSION_3_15 ||
                    dc->ctx->dce_version == DCN_VERSION_3_16)
                        hdcp_work[i].hdcp.config.psp.caps.dtm_v3_supported = 1;
                hdcp_work[i].hdcp.config.ddc.handle = dc_get_link_at_index(dc, i);